EDACafe Weekly Review May 17th, 2012

Joe Costello: Orb, Oasys, Epicenter
May 16, 2012  by Peggy Aycinena

 

On May 1st, Joe Costello was standing in his office at Orb Networks on the 6th floor of a building in downtown Oakland. When we started our phone call, he said, “I’m looking down on Broadway and there’s a massive march out there. It’s crazy — wish I could send you the video!”

It was, of course, the May Day Occupy Oakland march, which seemed just about right for this long-planned interview.

Twenty years ago, Joe Costello was CEO at Cadence; today he’s President & CEO at Orb Networks, a company that’s “cranking away at cool stuff in the media space.” Twenty years ago, Joe Costello was the epicenter of EDA; today he’s roiling things up elsewhere in the technology ecosystem.

So first we talked about Joe’s present and future, and then we got around to EDA’s present and future and What Would Joe Do if he was back in the epicenter today.

Atrenta’s unified platform
May 15, 2012  by Ed Lee

Maybe Atrenta is saying goodbye to the thought-bubble guy…..

Atrenta’s SpyGlass has always been the dominant name in the company’s brand portfolio,and for good reason. It’s the dominant product in RTL design analysis, verification and optimization.

Now, Atrenta is reconfiguring its product lineup to formalize this state of affairs. SpyGlass now becomes the unifying platform for all Atrenta products.  Sort of the mother ship that all Atrenta products are based on.

So what’s a unified platform? All the tools now share a common set up and debugging methodology and tighter GUI. And what can users verify and optimize from this new unified platform? Syntax, power, testability, clock synchronization, timing and routing congestion. All at the RTL stage, well before detailed implementation begins.

Eruptor: Portal of Power!
May 15, 2012  by Peggy Aycinena

 

My good friend Chas is 7 years old, and he is an expert on Skylanders. And I mean, an expert!

And because of that, I myself am now almost an expert. For instance, I know there are 9 elements: Life, Fire, Earth, Water, Tech, Magic, Air, Undead, and Legendary.

Every element has 4 Skylanders, and if you are Chas — or me — your hands-down favorite among the 32 Skylanders would be Eruptor and his magma pool. Or maybe Ignitor and his blue-flame combo. Eruptor and Ignitor, of course, are both Fire types which is why we like them so much!

Meanwhile, if you haven’t a clue what Chas and I are talking about here — or don’t know why there are 9 elements and 4 Sklyanders per element, but only 32 Skylanders in total — just ask us. Or better yet, watch the YouTube videos below and prepare to be blown away!

DAC 2012: Thermocouple Thursday in San Francisco
May 14, 2012  by Peggy Aycinena

 

Why call this Thermocouple Thursday?

For two reasons. First, because the rest of the days at DAC 2012 in San Francisco got alliterated:

* Super Sunday
* Marvelous Monday
* Terrible Tuesday
* Wicked Wednesday

And second, because “a thermocouple is a device consisting of two dissimilar metals joined at two points, the potential difference between the two junctions being a measure of their difference in temperature.”*

And if that doesn’t describe Thursday, June 7th, at DAC 2012 what does?

After all, nobody really sticks around for Thursday at DAC unless a) they’re presenting on that day, b) they’ve got a client and/or student presenting on that day, or c) they’re staying through the weekend to vacation in The City.

But people not sticking around for Thursday at DAC is just wrong, because Thursday is the thermocouple day that connects the  two main parts of life in EDA.

DAC 2012: Wicked Wednesday in San Francisco
May 13, 2012  by Peggy Aycinena

 

DAC looms!

If you do nothing else on Wednesday, June 6th, at the Design Automation Conference be sure to attend the second of the two keynotes.

Intel’s Brad Heaney will be talking about “designing a 22nm Intel Architecture Multi-CPU and CPU.” It’s got well over a billion transistors and would have only been the stuff of Sci-Fi dreams a brief 15 or 20 years ago.

After that, just like on Terrible Tuesday, you’ve got a wicked wheelbarrow full of different ways you could go, starting with the User Track. The Wednesday line-up in this well-received recent addition to the DAC schedule includes:

* Packaging & Automatic P&R, with speakers from Mentor Graphics, Samsung, and Intel
* Keynoter Q&A, with the morning’s IBM & Intel speakers fielding questions from the crowd
* Practical Formal Methods, with speakers from IBM, Oski, and Intel

If your interests, however, reside with the young more than the mega-organizations in the EDA ecosystem, Wednesday is your day to visit the ACM Sigda University Booth in the Exhibition Hall, where the “new EDA tools, EDA tools applications, design projects, and instructional materials” will be your guide to the future minds of this industry.

Jasper Design Automation
Spring Clean!


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