Video Roundup 
Sanjay Gangal
A showcase for electronic design videos around the world-wide web. Synopsys DesignWare PCI Express 3.0 with LeCroy Protocol Test SuiteJanuary 24th, 2012 by Sanjay Gangal
Utilizing the LeCroy’s protocol analyzer, exerciser and test suite, Synopsys demonstrates PCI Express 3.0 transactions through the DesignWare PCI Express 3.0 IP implemented on the Synopsys HAPS FPGA prototyping system. Presented by Scott Knowlton and Torrey Lewis.
Synopsys DesignWare SATA 6 Gb/s AHCI Host Controller and PHYJanuary 23rd, 2012 by Sanjay Gangal
Synopsys demonstrates the DesignWare SATA 6 Gb/s AHCI host controller and PHY implemented on Synopsys’ HAPS FPGA-Based Prototyping system interoperating with a commercially available SATA 6 Gb/s device. Presented by Scott Knowlton and Mat Loikkanen.
Cool Things You Can Do With the Discovery Visualization Environment (DVE) — Debugging UVM SequencesJanuary 20th, 2012 by Sanjay Gangal
Synopsys verification expert Yaron Ilani explains how to debug UVM sequences and transactions in the Discovery Visualization Environment (DVE).
Realizing End-to-End Mixed-Signal DesignJanuary 17th, 2012 by Sanjay Gangal
An in-depth technical discussion and demonstration on how the three key elements of Silicon Realization—-intent, abstraction, and convergence—can be applied to mixed-signal challenges and deliver an end-to-end, predictable path to silicon success. Key concepts include analog behavioral modeling, design (power) intent for mixed-signal IP, analog/digital interoperability, and mixed-signal design closure. Watch Realizing End-to-End Mixed-Signal Design
Cadence Silicon Realization OverviewJanuary 13th, 2012 by Sanjay Gangal
Productivity and predictability issues are making it crucial for engineers to optimize functional, electrical, and physical specifications concurrently rather than in the typical EDA silos. This close look into Silicon Realization reveals three critical requirements: unified design and verification intent; higher levels of abstraction; and convergence of late-stage design/manufacturing data into the early phases of design. Watch Cadence Silicon Realization Overview
Tutorial: Rapid Design Exploration with the Lynx Design SystemDecember 9th, 2011 by Sanjay Gangal
This 2011 SNUG Boston tutorial shows how to use the Lynx Design System for rapid design exploration and was presented by Kriss Westland of Synopsys.
IDT & BULL Improve Design Efficiency and Schedule Predictability with The Lynx Design SystemDecember 9th, 2011 by Sanjay Gangal
At recent Synopsys User’s Group (SNUG) events earlier this year semiconductor companies IDT and BULL shared their experiences on how the Lynx Design System contributed to their project successes:
First PostDecember 9th, 2011 by Sanjay Gangal
Welcome to the EDACafe Video Roundup. We will be showcasing the best of Design Videos on the Web for your edification. |
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Presented at CDNLive! 2010 by Dave Desharnais, Product Marketing Group Director, Silicon Realization, Cadence
Presented at CDNLive! 2010 by Chi-Ping Hsu, Ph.D, Senior Vice President, Research and Development, Silicon Realization Group, Cadence
