Eric Huang demonstrates USB 3.0 interoperability with a USB 3.0 Certification Gold Tree including all USB traffic types.
Video Roundup
Archive for the ‘DesignWare IP’ Category
Synopsys USB 3.0 Host and PHY Interop with USB Devices of All Speeds
Thursday, January 26th, 2012Synopsys DesignWare PCI Express 3.0 with LeCroy Protocol Test Suite
Tuesday, January 24th, 2012Utilizing the LeCroy’s protocol analyzer, exerciser and test suite, Synopsys demonstrates PCI Express 3.0 transactions through the DesignWare PCI Express 3.0 IP implemented on the Synopsys HAPS FPGA prototyping system. Â Presented by Scott Knowlton and Torrey Lewis.
Synopsys DesignWare SATA 6 Gb/s AHCI Host Controller and PHY
Monday, January 23rd, 2012Synopsys demonstrates the DesignWare SATA 6 Gb/s AHCI host controller and PHY implemented on Synopsys’ HAPS FPGA-Based Prototyping system interoperating with a commercially available SATA 6 Gb/s device. Presented by Scott Knowlton and Mat Loikkanen.
