Posts Tagged ‘SoC verification’
Tuesday, September 10th, 2013
In our last technical blog post, we surveyed some of the existing forms of coverage, including their virtues and limitations, and their applicability to SoC designs. We also introduced a new type of metric, system coverage, based on application scenarios that reflect how an end user would actually run applications on the SoC. We closed by claiming that “Breker’s graph-based scenario models are ideal for establishing, measuring, and refining system coverage.” This is the next in a series of posts to explain why and how.
Another earlier post described the Breker approach of “beginning with the end in mind” using graph-based scenario models. In the graphs used by TrekSoC, outcomes appear on the left and inputs appear on the right, reflecting the way that the test case generator works from the desired result toward the setup conditions needed for a particular application scenario.
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Tags: Breker, functional verification, graph, scenario model, SoC verification, system coverage, test generation, TrekSoC No Comments »
Tuesday, September 3rd, 2013
In just a week, my last post has become the most-read since we launched The Breker Trekker blog. That’s fine with me; beneath the intentionally provocative title I had some serious observations on how the EDA industry has evolved over the last couple of decades. My thought for the week is “never underestimate the power of zombies to grab people’s interest.” Mentioning zombies make me think of vampires, since the two are so intertwined in popular culture. There are lots of articles on why we’re so fascinated with these two creatures, and what it means when one is more popular than the other.
I’ll bet that most of you are running ahead of me now and thinking, “Vampires? This must be Breker’s column about venture capitalists.” Indeed this is a post about investors and their role in the formation and fate of EDA companies. Sure, some venture capitalists (VCs) might be viewed as vampires or vultures. But in my personal experience I’ve seen a wide range of investors with very different motivations and methods of interacting with their startups, most of them quite positive.
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Tags: Breker, EDA, functional verification, funding, investors, SoC verification, VC, venture capitol 2 Comments »
Tuesday, August 27th, 2013
From the blog stats it seems clear that late August is a slow time with lots of folks on vacation, so I’ll take a break from the heavy technical topics to chat about the industry. Long before I worked for an EDA company, I was an active participant as a user of EDA tools and as a CAD manager tasked with evaluating them and integrating them together. In that role, I loved working with interesting startups that had new ideas for electronic development.
It was part of my job to follow the EDA industry closely so that we could choose our tool investments based on both strength of technology and likelihood of vendor success. It seemed to me that the industry was divided into only three categories: major leaguers, minor leaguers, and startups. I observed that nearly all EDA startups disappeared after three or four years, with three possible endgames: acquisition, initial public offering (IPO), or bankruptcy.
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Tags: avant, behemoth, Breker, Cadence, corner store, EDA, functional verification, jasper, major leaguer, mentor, minor leaguer, SoC verification, startup, Synopsys No Comments »
Monday, August 19th, 2013
No SoC verification engineer worthy of the title would argue that coverage is unimportant. Even back in the 1980s, before commercial coverage tools and industry standards were available, leading ASIC teams manually added coverage code into their testbenches. They checked that key state machines visited all legal states or made all legal transitions, or that a processor executed all opcodes in its instruction set, over the course of a simulation test.
Verification teams who ignored coverage in those days were at risk of letting bugs slip through to silicon. The old maxim “if you don’t verify it, it’s broken” summed the situation up well. Today, leading SoC teams have adopted system coverage. Those who are ignoring this aspect of coverage are at risk of letting serious system-level bugs slip through. Let’s talk about system coverage and why it’s different from other metrics in use today.
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Tags: Breker, code coverage, concurrency, coverage, functional coverage, functional verification, graph, scenario model, SoC verification, system coverage, TrekSoC 2 Comments »
Tuesday, July 16th, 2013
As you may have noticed, we call Breker “The SoC Verification Company” because we truly believe that we are defining a new category of EDA tools for SoC verification that has not been adequately addressed by other approaches. In the spirit of an engineer defining his or her terms before use, and with a nod to the long-running TV game show Jeopardy, let’s discuss what defines SoC verification and why it is different from verification of IP blocks and other types of chips.
Let’s start one clue higher on the Jeopardy board, with “SoC” for $400. What exactly is a system on chip (SoC)? Some would argue that any large, complex chip qualifies. We beg to differ. Should a pure processor, no matter how powerful, be called an SoC? Alternatively, should a giant network crossbar switch with no central processor be considered an SoC? The Breker viewpoint says that neither qualifies. We believe that an SoC contains at least one reasonably powerful embedded processor (8-bit MCUs don’t count) and multiple IP blocks interconnected by some sort of bus or fabric.
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Tags: Breker, EDA, functional verification, integration verification, jeopordy, SoC, SoC verification, TrekSoC No Comments »
Tuesday, July 2nd, 2013
A year or two ago, cloud computing was a hot topic at EDA events and conferences. The industry’s largest player, Synopsys, talked a lot about running their EDA tools in the cloud and claimed a great deal of customer interest in this area. Earlier this year, CEO Aart de Geus was quoted as saying that “Synopsys had made $0 on it.” What happened? Is the idea of EDA in the cloud dead? What are the issues preventing its adoption?
In talking to customers and reading related articles, I’ve heard of several reasons why the cloud is not yet a factor for EDA. One practical issue is that EDA vendors are not sure how to price cloud-based licenses. If the customer motivation to move to the cloud is to more easily handle infrequently used tools or to provide peak capacity for frequently used tools, indeed the wrong pricing model could cost the vendor money. One technical issue is that some EDA tools are interactive and would be painful to use over the Internet.
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Tags: Breker, Cadence, cloud computing, EDA, functional verification, SoC verification 3 Comments »
Tuesday, June 18th, 2013
Back before DAC, I wrote a blog post on the rapid migration of technical information from magazines and catalogs to online-only publication. I addressed the topic from my perspective as a voracious reader of industry news who likes flipping through magazines as a nice break from staring at the screen most of the day. Just for the record, today over lunch I skimmed through the latest hardcopy issues of Information Week, Electronic Design, and MIT’s Spectrum. But my post also addressed a more serious topic: the evanescence of online technical content.
Futurists would have us believe otherwise: online is supposed to be forever. However, many technical sites are hosted by motivated individuals or organizations who may simply decide one day to stop. Other sites are owned by commercial interests, including publishers, who may fold and take their content with them into the void. Yes, there are organizations trying to capture the ongoing history of the Internet but, in my experience, their retention of desired content is inconsistent at best.
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Tags: Breker, dac, EDA, online, print, publications, SoC verification No Comments »
Friday, June 14th, 2013
I spent my last few posts previewing and reporting on the 50th Design Automation Conference (DAC) in Austin. As I have mentioned, this was the first time that DAC was held in Austin and so a lot of vendors were nervous about that. I know at least a couple of companies who downsized their DAC crews in anticipation of a smaller show. Well, the numbers are in and DAC did fairly well in Austin. Full-conference passes were 1589, down 16% from 2012 in San Francisco. Exhibits-only passes were 2364, down 15%. The number of both staffers was down 26%, reflecting both consolidation in the EDA industry and smaller crews.
No one really expected Austin to match San Francisco, but the numbers are quite respectable. What was especially interesting was that the number of exhibits-only passes exceeded by 15% those in San Diego in 2011. It seems that the local electronics community really turned out at DAC this year, already clear to us exhibitors since we saw many new faces we had not seen at shows in other locations.
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Tags: austin, Breker, dac, EDA, functional verification, SoC verification No Comments »
Friday, June 7th, 2013
My last post provided some impressions on the first two days of the first-ever Design Automation Conference (DAC) in Austin. It was very personal and perhaps even a bit self-congratulatory since I was so excited about how well the conference had gone for Breker. Well, this post isn’t going to be any less upbeat since the final day of the show was also great fun. For a start, we scanned more badges on Wednesday than on either Monday or Tuesday. That has to be a DAC first.
In addition to the skit and musical entertainment in our DAC booth theater, we also offered a brief product overview and several guest presentations. I’d like to thank Brian Bailey of EDA DesignLine and Brian Bailey Consulting, J.U. Nambi of CMR, and Srini Venkataramanan of CVC. Each of their talks drew a crowd and contributed to the diversity of our theater program. I’d like to expand this even further at future shows, with customers and additional partners offering their thoughts.
I was pleased with the technical panel “Disruptive Verification Technologies: Can They Really Make a Difference?” on Wednesday morning. Moderator Brian Bailey wove together several threads about the state of functional verification and a couple of “non-answers” from the panelists opened up some additional topics. I thought that Breker CEO Adnan Hamid did a nice job of positioning our SoC verification approach as a rare example of a technology that is disruptive yet usable today.
After a very busy six days (two days of booth setup, an all-day company meeting, and three days of exhibits), I finally found an hour or so to wander through the Convention Center and see what other companies had done for the show. I spotted two other booths with professional entertainers, but no musicians. As far as I could tell, in the self-proclaimed Live Music Capital of the World, Breker was the only DAC exhibitor to feature live music in its booth.
Since I did my wandering around wearing the “Breker Man” cape from our skit, I saw lots of double-takes and a few doubling-overs with laughter. My former colleagues at Cadence teased me repeatedly and I’m sure there are incriminating photos somewhere on the Web, but I minded not a bit. The combination of recommendations from Gary Smith and others, Breker’s growing reputation, live music, and a wacky skit that stopped people in their tracks resulted in us gathering more than three times the leads of any previous DAC (or any other show).
Finally, I can’t say enough good things about the decision to hold DAC in Austin. Our lead number speaks for itself and, as I noted in my last post, we saw a lot of local folks who had never attended a DAC before. We had tons of good food, including four of the most famous BBQ joints, and I capped the week off with visits to the Blanton Museum of Art and the incredible Flatbed Press and Gallery before heading to the airport on Thursday. I’m planning a separate post on DAC locations, but for now suffice to say that I hope Austin becomes a regular stop.
Tom A.
The truth is out there … sometimes it’s in a blog.
Tags: Breker, dac, EDA, functional verification, SoC verification No Comments »
Tuesday, June 4th, 2013
I’m very tired and a bit giddy as I write this post, late in the evening after the second day of exhibits at the Design Automation Conference (DAC) in Austin. Frankly, a lot of us EDA vendors were concerned about holding DAC in Austin for the first time. Of course there is a large electronics development community in Austin, but the first time in a new location for any conference is always a bit of a gamble since you never know what kind of response you’ll get.
I haven’t seen any statistics for DAC overall yet but I will say right now that the preliminary results for Breker are just amazing. My first scan of the leads we’ve gathered shows this to be our best conference ever both in terms of both quantity and quality. In addition to seeing some old friends we’ve met many engineers from the Austin development centers we had not met before. Most said that they had never attended DAC in previous years but were glad to be able to do so in their own backyard.
One reason for the larger crowds around the Breker booth was a greatly expanded presentation schedule, including a really fun skit. Austin musician and storyteller Rudy Roberson entertained the crowd as the singing captain of the “USS Ice Breker” while yours truly made a special cameo appearance as “Breker Man.” There’s nothing better than some music and a bit of nerdy humor to get people to stop and check out your booth.
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Tags: Breker, dac, EDA, functional verification, SoC verification Comments Off on Check-In after Two Days at DAC 2013
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