See Breker at Four Shows in Four Locations over Four Weeks

What verification engineer doesn’t love the occasional conference? It’s a chance to get out of the cubicle farm, hang out with colleagues from other companies, listen to stimulating technical talks, and catch up on what EDA, IP, and semiconductor vendors have been doing. Even in a time of tight travel budgets, the right conference can provide dividends far beyond its cost. There are a lot of smart people in the electronics industry and it’s valuable to share problems and solutions with them.

There are actually quite a few conferences and trade shows that have interesting verification content and draw significant numbers of verification engineers. One of the most-read posts in the history of The Breker Trekker blog was a discussion on which conferences verification engineers like best. We are constantly evaluating which events provide the most value to us and our customers, and find ourselves in the unusual position of having four shows scheduled in four locations over the next four weeks.

This week we will be at SNUG Boston, which is being held at the Boston Marriott Newton Hotel. SNUG is the Synopsys Users Group event, held in multiple locations annually. We will exhibit at the Designer Community Expo, held on Thursday, September 11, from 4:45 pm until 7:00 pm. We’ll have a short presentation available and our giveaways will be the same shopping bags that proved extremely popular at the Design Automation Conference (DAC) back in June.

We exhibited at SNUG Silicon Valley both last year and this year, and really enjoyed talking with engineers who were starting to hit the wall in their verification of SoC designs. This year, we have the Coherency TrekApp available for TrekSoC users and we expect a great deal of interest. We have also introduced TrekUVM, which provides faster and better verification for large chips that don’t happen to contain embedded processors. This opens the door for a whole new group of customers.

On Tuesday, September 23, we travel to Austin, the birthplace of Breker, for SNUG Austin in the Hyatt Regency. You may recall that last year’s DAC was held in Austin, and it was a great show for us. We saw many new faces who don’t make it to the Silicon Valley events. We will be exhibiting at the Designer Community Expo from 5:00 pm until 7:00 pm. Again, we’ll offer giveaways and the chance to learn about our recently expanded range of products and solutions.

By the way, although we’re focusing on our own activities don’t forget that both SNUG Boston and SNUG Austin are full technical conferences, with multiple tracks on many topics including functional verification. The same is true of DVCon India, which is being held for the first time ever in Bangalore’s Hotel Park Plaza Thursday and Friday, September 25-26. The two days are packed with technical sessions and tutorials on a wide variety of subjects.

Breker will be contributing to two of the tutorials. We are co-sponsoring “Achieving Portable Stimulus with Graph-Based Verification” on Thursday afternoon with Mentor and CVC. Many of you are no doubt aware that Accellera has a proposed working group looking at standardization of portable stimulus so this is a very timely topic. Our CEO and co-founder Adnan Hamid will discuss Breker’s view of portable tests (stimulus, results checking, and coverage) and what might be needed in a standard.

Adnan will also be making a guest appearance in another Thursday afternoon tutorial, “SoC Verification Challenges Offer Opportunities to Take a New Look at Debug,” co-sponsored by Synopsys and CVC. We asked to join so that we can demonstrate the successful integration of our TrekSoC GUI with the Synopsys Verdi HW SW Debug solution. You can meet Adnan in person at the Breker booth in the Networking Cocktail/Snacks Party Thursday from 5:30 pm until 7:30 pm.

Finally, we return to Silicon Valley for ARM TechCon Wednesday, October 1 through Friday, October 3 at the Santa Clara Convention Center. We will have a booth in the Expo, open Wednesday from 11:00 am to 6:00 pm and Thursday from 10:30 am to 5:30 pm. We exhibited last year as well, and found this event noteworty because we talked to embedded programmers and silicon validation teams in addition to pre-silicon verification engineers. This year, we expect a great deal of interest in our Coherency TrekApp.

We would love to see you at any (or all!) of these four events. We’re doing everything we can to let verification engineers with tough challenges know how Breker can help. If there are other appropriate conferences or industry events that you attend, please let us know so that we can consider participation.

Tom A.

The truth is out there … sometimes it’s in a blog.

Tags: Accellera, apps, ARM, austin, Bangalore, Boston, Breker, Cadence, coherency, CVC, DV, dvcon, ESL, functional verification, India, mentor, Newton, portable stimulus, Santa Clara, SNUG, Synopsys, TechCon, TrekSoC, TrekSoC-Si, TrekUVM, uvm

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