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Graham Bell
Graham Bell
Graham is Sr. Director of Marketing at Silvaco Inc. An experienced semiconductor-design marketing strategist and avid blogger before joining Silvaco, Graham previously was VP of marketing at Uniquify, a fabless SoC product and IP company, and at Real Intent, a verification software company. In his … More »

New MIPI I3C V1.1 Standard Streamlines Peripheral Connectivity with Lower Cost and Higher Bandwidth

 
February 6th, 2020 by Graham Bell

The MIPI Alliance (MIPI) develops interface specifications for mobile and mobile-influenced industries.

There is at least one MIPI specification in every smartphone manufactured today. On January 15, MIPI announced an update to the I3C peripheral connection standard to version 1.1 with many new features. It will streamline integration and lower cost in the development of smartphones, IoT devices, server management, automotive applications, and more. MIPI I3C v1.1 is a scalable, medium-speed utility and control bus that connects peripherals to an application processor, and it is now available to MIPI Alliance members like Silvaco.

In their press release, Joel Huloux, chairman of MIPI Alliance, said “Delivering a dramatic speed increase and a host of new features to enhance reliability, MIPI I3C v1.1 significantly strengthens the upgrade path for I2C applications and enables many different use cases across mobile and multiple other markets including automotive, PC clients, data centers, drones, industrial and the Internet of Things (IoT). The specification is ideal for system-level implementers seeking a low-cost, off-the-shelf standardized utility bus solution with a small printed circuit board (PCB) footprint and a well-defined and readily available ecosystem of peripherals, sensors and applications.”

Relying on a lower number of pins and the smallest amount of PCB real estate compared with other bus solutions, MIPI I3C integrates mechanical, motion, biometric, environmental, and any other type of sensor. The new version builds on those capabilities with new features for peripheral command, control, and communication to a host processor over a short distance.

One of the most important features in the 1.1 version is the extensible use of extra bus lanes to increase the interface speed to near 100 MHz, future-proofing the interface for rising speed requirements. The greater speed support and a host of new features—grouped addressing, enhanced error detection/recovery, secondary reset, comprehensive flow control, outside end transfer and new command, control and communication (CCC) capabilities—work together to enable a diverse set of new applications:

  • “Always-on” imaging
  • Server manageability
  • Debug application communications
  • Touchscreen command and communications
  • Sensor device command, control and data transport
  • Power management
  • Memory control

Ken Foust, MIPI I3C Working Group chair, said in the press release, “In developing MIPI I3C v1.1, the working group relied on input from real-world market experiences to put in place what was missing and deliver the final capabilities to enable I2C implementers to move to I3C. As we look at the next evolution of MIPI I3C, the working group will be considering a range of new capabilities, including longer reach, various specification development improvements, more automotive requirements, speed increases, new multi-lane uses, new PHY approaches, standardized connectors and other feature refinements.”

Silvaco will have an upcoming announcement of the availability of MIPI I3C V1.1 design IP. Keep a look out for news about the availability of this SIPware offering.

To learn more about the MIPI Alliance announcement, read the press release MIPI I3C v1.1 Utility and Control Bus Strengthens Upgrade Path for I2C Implementers.

Category: Silvaco

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