The same day we hosted the Silvaco Users Group event (SURGE) in Silicon Valley on October 24, we also had an online webinar on artificial intelligence (AI) and machine learning (ML) SoCs from a memory and interconnect IP perspective. This webinar discussed the challenges of developing AI-based and ML-based SoCs and the novel architectures needed for AI and ML applications to meet efficiency requirements. These include specialized processing, high bandwidth and low-energy memory throughput, and reliable high-performance connectivity. The webinar also discussed the efficient customization of memory and interconnect IPs for successful development of AI and ML SoCs.

To register and view this pre-recorded event, go to the AI and Machine Learning SoCs – Memory and Interconnect IP Perspectives page.

Presenter

Ahmad S. Mazumder is the presenter for the webinar. He is a principal field application engineer in IP Engineering division of Silvaco. He is responsible for development and customer support in all analog and interface IPs. He is an industry veteran on the development of high-speed memory, interface IPs, and many types of analog IPs. He worked on cutting edge DDR, extreme high-speed SerDes, interfaces, ESD, and QoR for 24 years at various SoC companies (Intel, Broadcom, C-Cube Microsystems, etc). He recently joined Silvaco’s IP Engineering division.

Ahmad S. Mazumder holds a MS in VLSI Semiconductor Design from the City University of New York and BS in Electrical and Electronics Engineering from Bangladesh University of Engineering and Technology.