Fig. 1. Process and device simulation of a SiC power trench MOSFET.
A quick search of the IEEE Xplore online library gives a list of more than 230 published technical articles on Power Device Simulation using Silvaco TCAD. Here are some recent papers with the authors' abstracts that cover silicon-carbide (SiC) and Junction-Less Double Gate MOSFET devices. Any mention of 'we' or 'our' refers to the paper's authors:
Study of oxide trapping in SiC MOSFETs by means of TCAD simulations, Materials Science in Semiconductor Processing, Volume 97, July 2019, Pages 40-43
“SILICON CARBIDE (SiC) material has attracted substantial attention during the last few years as a promising candidate for making power devices for high-temperature operation and under harsh environments. In spite of the considerable progress in device performance, reliability may be a limiting factor for the introduction of SiC MOSFETs in commercial power devices. One of the major reliability concerns is the instability of the threshold voltage in MOSFETs and, similarly, of the flat-band voltage in capacitors under normal operation conditions. This instability is attributed to trapping of channel electrons in interface and bulk oxide traps.
“The main goal of this work is to investigate how the trapped charges at SiO2/SiC interface influence the C/V curve. In particular, by means of 2-D numerical simulations (SILVACO tools), we could isolate the two different contributions from p-type and n-type doped regions of our MOSFET and we considered both donor and acceptor traps contributions. Then, we compared the simulation results with experimental C/V curves. A good agreement between TCAD simulations and experimental measurements was obtained. So, device simulations can provide a better understanding of such defects at SiO2/SiC interface and we give an insight into the influence of traps, produced during device processing or caused by radiation environment, on the output characteristics of the device.”
