Almost as long as FPGAs have been around, they have been used to prototype ASICs, SoCs, and IPs. While initially, the only option for users was to build their own prototyping board, that quickly changed with many commercial prototyping boards becoming available from vendors large and small. Ever since, the large question for users has been, should I develop and build or buy my boards?

Now, consider the pros and cons of this “build vs. buy” debate. But before that, probably the first question to ask yourself is what do you want the FPGA-based prototype to do? Having that answer allows you to consider the right priorities and trade-offs inherent in the decision to build or not to build a board.  Let’s assume you buy rather than build, which commercial solution should you purchase? Key questions to ask yourself here are:

• What is the primary use mode, HW (RTL) verification or SW validation?
• How many FPGAs per board/system are needed to handle my design (e.g. single vs. multi-FPGA)?
• How many boards will I need?
• What physical at-speed interfaces do I need?
• What is the minimum performance the FPGA board must run at?
• What is my budget?

While every engineer’s first inclination is “I can do it better, faster, cheaper”, let’s discuss just those three claims:

• Better? Maybe, but …
  Do you have the expertise and tools to design a board with an FPGA with several thousand pins?
  Have you considered scalability and reuse for future projects?

• Faster? Certainly not …
  We are talking about a total development time of 6 – 9 months!
  What about potential board re-spins?

• Cheaper? Most likely not …
  Have you accounted for the development costs, not just the final bill-of-material?
  What about manufacturing yield and repair/rework costs?

So, in the end, the case for commercial, off-the-shelf boards, like Siemens’ Veloce proFPGA CS, is strong:

• Lowest cost, no upfront (development) costs. You pay for what you buy and use
• Immediate availability, no months–long development cycles
• High-quality, thoroughly tested, certified, and supported systems
• Expert support
• No schedule risk

And let’s not forget, the hardware itself.  The FPGA board, is just one part of what is needed to take full advantage of the benefits an FPGA-based prototype system can provide. What is also required is the complementary implementation and debug software, from RTL-compile over multi-FPGA partitioning to debug instrumentation and runtime control. Only the combination can unleash the full potential of what FPGA-based prototyping promises.

FPGA-based prototyping is essential for any SoC and digital chip design and verification.

Choosing the right prototyping solution is critical for success, as is considering all options, including hardware and software aspects, when deciding on a solution that is right for your requirements!

To learn more, download the Veloce proFPGA CS factsheet or contact us at 1-800-547-3000.

With the AMD VP1902 FPGA device boasting double the capacity, you unlock a whole new level of performance and cost-effectiveness.

Whether pushing the boundaries of SoC verification, validating complex IP blocks, or simulating massive software workloads, the Veloce proFPGA CS software prototyping platform, equipped with the VP1902 FPGA device, doubles the capacity and delivers verification success.

Performance. You can map more of your design onto a single chip. This means that fewer FPGA devices are needed overall, resulting in streamlined mapping and improved performance. The benefits extend beyond performance. With fewer FPGA devices required, the cost per gate for your prototyping platform plummets. That’s right – 50% lower cost per gate means significant savings for your budget. You can achieve more with less, maximizing the performance of your resources.

Consolidation: Mapping your design onto a single high-capacity FPGA simplifies the setup and configuration process. No more juggling multiple devices or dealing with complex interconnectivity.

Simplifying setup and configuration means faster and more efficient prototype bring-up, allowing you to accelerate your development cycle like never before. You have more opportunities to test different scenarios, catch potential corner case issues, and optimize the quality of your design.

To learn more, download the Veloce proFPGA CS factsheet or email Romain Petit romain.petit@siemens.com for details.

FPGA-based prototyping has always been something of an assembly-required construction kit. Consequently, getting to a functional and usable prototype took a lot of effort, time, and a ‘do it yourself’ attitude. Once up and running, however, the reward justified the effort by providing a fast pre-silicon verification platform, with frequencies often running at tens of megahertz and reducing verification workload runs from days to minutes.

Then chip designs exploded in complexity, software content increased exponentially, and the sheer amount of data going in and out of an SoC grew by orders of magnitude. And let’s not forget that design cycles shrank at the same time. FPGA-based prototype platforms, uniquely suited to address those challenges, have become essential to SoC verification and system validation.

As all this change was happening, prototyping evolved as well. Today it is no longer a construction kit, but a ready-to-use, comprehensive solution that delivers significant productivity gains.

You might ask, what are the primary attributes of this evolved FPGA-based prototyping platforms? Obviously, it’s hardware consisting of one or more FPGAs!

It’s also the software that takes the ASIC RTL and intelligently maps it into the collection of FPGAs.

It’s also a test environment that stimulates the design, often with live system interfaces like sensors, cameras, and ethernet traffic.

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In today’s fast-paced world of hardware design and verification, accelerating time-to-market and optimizing resources are paramount. Hardware-Assisted Verification (HAV) significantly reduces verification time, allowing hardware design teams to meet tight deadlines and bring products to market faster. Moreover, HAV enables thorough testing of intricate designs, uncovering potential issues early in the development cycle and ensuring product reliability. While HAV represents a significant investment and offers numerous benefits, managing multiple projects, diverse teams, and varying job priorities on a shared HAV platform can be overwhelming. Enter the Veloce Enterprise Server (ES) App – a revolutionary solution developed by Siemens EDA to streamline Veloce hardware resource management and transform the HAV landscape.

Understanding Hardware-Assisted Verification

Hardware-Assisted Verification (HAV) uses dedicated hardware to accelerate the verification process of semiconductor designs. This approach allows for faster execution of test cases compared to traditional software-based simulations, significantly speeding up the verification cycle. HAV is particularly beneficial for large and complex designs, where traditional simulation methods fall short in terms of speed and capacity. For more information on Siemens EDA HAV, see the article, “Siemens delivers next-generation, comprehensive hardware-assisted verification system”.

However, managing the efficient use of HAV resources, especially when dealing with multiple projects and teams, poses significant challenges. This is where the Veloce ES App comes into play.

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