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Siemens EDA ![]() Keroloss Honain
Keroloss Honain has over 12 years of experience in the field of electronic design verification. He joined Siemens EDA in 2016 as part of the Hardware-Assisted Verification (HAV) R&D engineering team. Currently, he is the Product Manager of HAV ICE Solutions and is responsible for driving … More » Accelerate Your Pre-Silicon VerificationFebruary 4th, 2025 by Keroloss Honain
Today’s complex System-on-Chip (SoC) designs and high-performance solutions demand robust, high-speed interfaces that keep pace with evolving market needs. As adopting the PCI Express (PCIe) 6.0 standard gains momentum, design teams face new challenges in ensuring reliable, high-throughput communication for data centers, edge devices, automotive systems, and beyond. That’s where our new ICE PCIe 6.0 speed adapter steps in—providing the ultimate bridge between the Veloce Strato/Strato+ emulation platform and the real world. Why PCIe 6.0 Matters PCIe 6.0 represents a significant leap in throughput, doubling the data rate over PCIe 5.0 to 64 GT/s per lane. This breakthrough efficiency supports the exponential growth in data-intensive applications like:
As speeds increase, verification complexity skyrockets. Testing and validating PCIe 6.0 capabilities early in the development cycle is critical to avoid costly silicon re-spins and unexpected integration issues.
iSolve PCIe 6.0: Turnkey Speed Bridge Tailored for Veloce Strato Emulator By connecting to your existing Veloce Strato or Veloce Strato+ emulator, the iSolve PCIe 6.0 speed adapter offers cycle-accurate and protocol-compliant signals at emulation speeds. Veloce Strato capacity and execution speed enable customers to boot OS, run firmware, and connect real hardware to test thoroughly:
You get comprehensive visibility into every handshake, packet, and transaction—ensuring your SoC passes real-world compliance with flying colors.
To learn more, visit https://Siemens.com/veloce or contact us at 1-800-547-3000. Category: Siemens |