In an industry accustomed to incremental change, Veloce CS is a departure because it is a complete three-in-one system, a development that Ron Wilson, a longtime technology editor, explores with Brunet in this 2-part blog.
Wilson: How do you describe the Veloce CS system?
Brunet: The Veloce CS system is architected for congruency, speed and modularity and supports design sizes from 40-million gates to designs integrating more than 40+ billion gates. It executes full system workloads with elevated visibility and congruency, enabling teams to select the right tool for a task’s unique requirements for faster time to project completion and decreased cost per verification cycle.
Wilson: Why now?
Brunet: We recognized the discontinuity triggered by the convergence of AI-related hardware, software defined product, new process technology and the emergence of chiplet-based systems. We responded by developing three economical, scalable systems that directly address the needs of design teams. Our goal with the Veloce CS system is to be the instrument to create the next-generation advanced ICs and multi-die modules bringing new levels of productivity to design teams and new levels design and schedule integrity. We envision a new value proposition for IC vendors, IP houses or systems developers who will transform these advanced IC designs into earnings growth.
