EDACafe Industry Predictions for 2024 – Everspin

By Sanjeev Aggarwal, Ph.D., President and CEO, Everspin

Sanjeev Aggarwal

• Technological Innovations: “What major technological advancements or innovations do you foresee occurring in your industry in 2024, and how do you plan to adapt or lead in these areas?”
• Market Trends: “How do you predict consumer behavior and market trends will evolve in 2024, and what strategies are you implementing to meet these changing demands?”
• Artificial Intelligence Integration: “How do you envision the role and impact of artificial intelligence in your industry in 2024, and what steps is your company taking to integrate AI into its operations or offerings?”

There has never been a more exciting time to be in the semiconductor memory business. Innovation is required more than ever as it becomes clear that advances in computing at all levels are limited by memory performance. At the extreme performance boundary of AI acceleration for high-performance computing there will be broader adoption of high-bandwidth memory structures that provide wider I/O data busses to increase throughput and provide data to the multiple cores starving for data. Bus width of 1,024 with up to 9GT/s will give way to 2,048, bringing challenges to high-density memory providers to reduce micro-bump pitch and increase the density of TSVs to maintain the footprint in 3D SiP modules. This tends to drive the news in the memory industry, several other trends drive innovation as well.

• To improve time-to-market and enable feature enhancements in electronic systems, there is an increasing need to provide rapid software updates to systems in development as well as those already deployed in the field. Coupled with the increased wireless network speeds offered by 5G, we see Over-The-Air (OTA) updates becoming ubiquitous. MRAM provides the unique combination of fast write speed with non-volatility, which will be of increasing important as designers must cope with preserving system integrity while making updates. MRAM enables fast download of software updates, writing 200 times faster than NOR Flash with no pre-Erase needed while providing enough capacity to maintain existing code as the update occurs.

• AI moves from the data center to the edge and far edge of networks as both consumer and industrial applications require more and more intelligence. Incorporating AI accelerators in embedded systems will put new demands on local memory. Edge memories need to be denser and more power efficient to operate with the energy constraints at the edge. Most of all, they need instant-on capabilities with faster write capabilities to capture data in short timespans before powering down again. MRAM has been widely deployed in such applications as casino gaming and industrial robotics require data capture in flight. MRAM can capture data from the physical sensor inputs, store embedded system code and configuration data, and provide local stored weights to speed inference models all in one memory type, improving energy efficiency while protecting critical data in harsh environments. MRAM is expected to play a significant role as AI moves to the edge,
• Chiplets is the buzz, and there is increasing recognition that in order for adoption beyond the high-performance compute modules, there have to be standardized solutions that are more cost-effective. In 2024, we expect to see adaptations of standards that provide lower cost phy’s and modules, giving embedded system designers better options to implement custom-configured systems that can take advantage of fast, non-volatile, high-endurance MRAM in chiplet form. This approach will work in concert with integrated memory on SoCs such as embedded MRAM, but without sacrificing memory performance that comes with typical foundry eMRAM offerings.

In summary, there will be continued innovation at all levels of the compute hierarchy, from the AI LLM-driven HPC down to the far-edge, AI-enabled systems. MRAM is well established as a very durable working memory in industrial systems today and will gain more traction as more systems demand local data processing in cost-effective, low-energy-constrained environments.

About Author:

Sanjeev directs the R&D program for Everspin’s Spin-transfer Torque MRAM. The scope includes managing engineering groups to resource and execute on projects from technology definition to qualification, driving cross functional alignment across various departments, as well as manage joint development agreements for technology transfer and production. Prior to this role, he was VP, Manufacturing and Process at Everspin, where he was responsible for FAB operations managing the production of Toggle and Spin-transfer Torque MRAM.

Category: Predictions

This entry was posted on Tuesday, January 30th, 2024 at 12:46 pm. You can follow any responses to this entry through the RSS 2.0 feed. You can leave a response, or trackback from your own site.