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Valeria Bertacco
Valeria Bertacco
Valeria Bertacco is Arthur F. Thurnau Professor of Electrical Engineering and Computer Science and Associate Dean for Physical Sciences and Engineering in the Rackham Graduate School at the University of Michigan. She is also an Adjunct Professor of Computer Engineering at the Addis Ababa Institute … More »

#55DAC: Must-see DAC technical sessions this June in San Francisco

 
April 26th, 2018 by Valeria Bertacco

By Valeria Bertacco, 55th DAC Conference Program Chair

This June at DAC, we will have the opportunity to discuss and learn about key topics that are emerging in the system design and automation community.

To start, we have the challenge of designing at the end of silicon scaling and beyond: devices, design complexity and verification. On Monday, there will be a tutorial on designing at advanced technology nodes, followed by an invited session on the same topic on Tuesday in the Designer Track.

We will also begin to discuss modern challenges in verification in the face of today’s design complexities. This hot topic will pick up throughout the week with panels, special sessions and reviewed paper presentations, ranging from automating away the complexity of the design process (“the road to no human in the loop” on Tuesday), design productivity (“design productivity in SoC,”  “mind the gap”), verification challenges (“black art of verification”) and new emerging devices (“the zoo of emerging devices”) to design tomorrow’s computing systems.

For those of you  interested in emerging storage and storage technologies, there is also abundant coverage:  From solid-state storage devices (“how solid is your storage,” “solid ideas”), to the storage-centric system solutions (“memory-centric architectures,” “emerging storage,” “memory that never forgets”), complemented by a thorough discussion of the leeway of approximation techniques, in particular in relation to their impact on storage, system reliability and application accuracy (“watch your bits,” “good enough is enough”).

For the researchers, both from industry and academia, we will have a two-hours panel on research funding. Wednesday after lunch we can discuss trends and directions in funding with a slate of panelists from around the globe. This topic is becoming a strong DAC tradition, in light of the interest it has attracted in the recent past.

Moreover, this year at DAC we will begin the conversation about diversity in our industry: what is its value, how do we attain a diverse work environment and what changes do we need to pursue for it to be effective. This discussion will start with an all-day Monday tutorial and will continue with a panel on Wednesday afternoon (“making your team high performing,” “diverse engineering teams are better”).

And then, we have of course the two topics that have been gaining the strongest momentum in the past few DAC events: security and deep learning. On the security front, the program offers two tutorials on “IoT security” and “verification for security.” Once we have built the background knowledge, the program offers multiple sessions each day, discussing software and hardware security, ranging from “best practices” in the designer track, to innovative solutions, both at the architectural and logic levels, in the context of general and embedded systems, particularly the highly exposed IoT world.

As you probably guessed, deep learning is pervasive throughout the program, and I cannot even begin to list all the sessions that tackle this topic. Just know that we will offer several research presentations, invited sessions and panels, both in the research and designer/IP tracks, presenting how to design for deep learning application systems, and how to leverage deep learning in our design processes; deep learning for security and security in deep learning applications. If you are not a deep learning expert, I strongly recommend the broad offering of tutorials (“ML for EDA,” “ML in IoT,” “data science for verification”) to get you up to speed by Monday night.

As you can see, it’s a packed conference program! I hope you will enjoy it, and find some time for the always important networking, too — at the sessions or at the research lounge. I will be there, walking the hallways and attending the talks, and I am very much looking forward to reconnect with old friends and meet the new faces of DAC!

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