I am very pleased  to announce that the 1,000th Technical Paper has been posted on EDACafe.com.    Our library of papers is a great resource for design teams world-wide to stay up to date on latest methods and technologies for design.

And what was the number 1000 paper?

Post-Silicon Validation Using Formal Analysis from Jasper Design Automation.

If you want to reach our audience of 75,000 unique monthly visitors and 30,000 e-news subscribers, just send your paper submission  here and select the category “Technical Papers” from the pull-down menu  or send an email to graham@edacafe.com.

GO GIANTS!

+Graham

I just read the acquisition press release by Synopsys for the purchase of Optical Research Associates (ORA).  There is a lot of business activity in the area of computer displays and with LED lighting systems. You can see this in particular with the number of announcements coming out of Taiwan as its strong manufacturing operations there are trying to meet growing demand for newer, better and more efficient systems.

Is Synopsys really starting to move outside of its traditional electronic focus and embracing a new optics business model?  I think not.  ORA has a very strong consulting business and I believe that assisting customers with their electro-optical designs from IC and device through light emission and display provide the vertical alignment that will be attractive to many teams.

What are your thoughts about the requirements for electro-optical design and do you think other EDA players will also enter this part of the market?

+Graham

I had the pleasure of attending the GSA Emerging Opportunities Expo & Conference in Santa Clara on Sept. 16.   I did 7 video interviews which you can see at the GSA Expo 2010 Video web-page or you can click right here:

“40nm TSMC Multi-channel 6.5Gbps SerDes”, Mahesh Tirupattur Analog Bits

“Emerging Opportunities Keynote”, Jodi Shelton GSA Global Expo

“Extraction for RF & Hi-speed Design”, Anand Raman Helic website

“New V4 ColdFire Core”, Warren Savage IPextreme

“New SGMII SerDes IP”, Ashraf Takla Mixel

“New 32nm Low Power Hi-K Metal Gate Process”, Ana Hunter Samsung Foundry

“Enhancements for Mobile Infrastructure”, Art Reidel Scintera Networks

“New General Purpose PLL”, Stephen Maneatis True Circuits

Note: The keynote presented by Jodi Shelton was copied from the GSA Global Program Page.

It was a little unusual to have both the EDA Tech Forum event and the GSA Global Expo both on the same day at the Santa Clara Convention Center.  You can enjoy the photo galleries I took for the EDA Tech Forum, GSA Global Expo and the GLOBALFOUNDRIES Tech Conference events here:

EDA Tech Forum Photo Gallery (See me holding Jon Landau’s Oscar for Titanic!)

GSA Global Photo Gallery

GLOBALFOUNDRIES Tech Conference Photo Gallery

Enjoy!

+Graham

I thought I had done lots of video interviews (44) at last year’s DAC show in San Francisco.   This year I went completely over the top and did 54!

54 EDCAfe Videos Link

One thing I noticed this year is that the interview were going longer and often lasting 5 to 6 minutes.    Everyone had something to say and we’re going to say it!

One video even has a magic trick that really works!  You will be amazed:

“Wicked Rumor, SpyGlass Physical, …and Magic!”

I also did a quick photo gallery of the different booths on the floor of the show.  You can see them at:

64 DAC Exhibit Photos

I hope you enjoy this video blog of the show and learn something that you missed at the Conference.

I wish everyone an excellent Independence Day Holiday….and for all those Canucks out there I hope your Canada Day was fun….mine was.

+Graham

I went to the DAC Web-site Exhibitor Page and counted 23 new companies exhibiting at DAC.   They span the world of design from A to Z.  We have aquintos LLC – (Model-based system design tools) to Zocalo Tech (Assertion Based Verification tools).

This leads me to conclude despite the ongoing challenges to the industry, innovators and entrepreneurs are still working hard to bring their new technologies to the design world.  Here are three new companies that are in the back-end of the design flow I think are worth taking the time to look at:

Cybereda (booth #164) is showing their new parallel SPICE tool and a new Analog Design Debug System.  They say you will get a 10X breakthrough in simulation speed and 10X faster bug killing.   I am glad to see new automation tools for analog designers.

Grid Simulation Technology (booth #1262) have two new products, NanoRAIL and SimCHECK, for tackling complex IC power  grid problems including IR voltage drop and electro-migration (EM) and the qualification of complex power network analysis results.   From what I can tell, they have a speed, accuracy and capacity breakthrough for power-net problems.

Coventor (booth #269) provides 3D MEMS simulation, analysis and design automation software for the development of micro- and nano-scale devices and systems.   Coventor has created an IC compatible MEMS + IC design flow. Its MEMS+ suite integrates with tools from Cadence and The Mathworks to enable IC designers to more efficiently incorporate MEMS into their product designs.

And finally come by the EDACafe booth #1015, and see our video studio on the floor of the DAC show.  We will be recording over 40 interviews of executives and industry leaders in front of our green screen.  I look forward to seeing you there.

+Graham

I was at the SNUG San Jose event taking place in Santa Clara (funny how that is) and I took photos at the Designer Community Expo.   There were 50 exhibitors participating.   The Expo was divided into different communities:  Computer Infrastructure, Custom Design and AMS Verification, FPGA, IC Design, IC verification, IP and System Design.   Kim Anderson from Synopys was my guide to the Expo.  She did an excellent job shepherding me around the event.  See if you can find her in the Photo Gallery at SNUG San Jose Photos.

Phil Morris, Synopsys World-Wide Marketing Director for Strategic Alliances gave a video interview that covered the background for the event and the evolution from the Interoperability Fair seen at previous SNUGs.   You can see the interview at Designer Community Expo Video.

I have started to use a different interview technique where the camera is looking over my right shoulder during the interview.   Viewers get to see the back of my head but more of the interviewee.  Let me know if you like the change.

Recent Conference Interviews:

ISQED March 22-24 – 22 videos

DVCon Feb. 22-25 – 6 videos

Best Wishes for a Happy Easter!
+Graham

A new startup was launched this week that offers a new SPICE simulator that takes advantage of multi-CPU computers to speed analysis of transistor circuits.    Cybereda is the name of the company and was founded by CK Lee, an EDA veteran who has many years experience with analog simulation at companies such as Nassda, Synopsys and EPIC.

The speedup claimed by this new SPICE offering is 10x over popular commercial simulators.  I think they maybe comparing their runtimes to HSPICE.   While faster SPICE simulations are always appreciated, Cybereda also claims that commercial SPICE offerings can easily product incorrect results even with simple circuits.  I took a look at their web-site and they show an example of a MOS device driving a capacitive load.   The commercial SPICE simulator gave the wrong answer.  See http://www.cybereda.com/?page_id=12

My take-away from this is that you always need to check what your SPICE simulator is doing and understand what the impact step-size and tolerance settings have on the results.

Have you been fooled by a SPICE simulation?   Let me know what happened to you.

Happy Holidays to Everyone!

+Graham

I was at PCB West last week on Sept. 15th.   It was taking place at the Santa Clara Marriott in their large ballroom.  I came in the mid-afternoon so I could take photos for a photo gallery, and to some video interviews for PCB and EDAC Cafe clients.   I had the sense the show was more subdued than previous years but Show management really worked to make it easy for folks to attend, get a free lunch and see some open sessions.  Kudos to Alyson over at Up Media Group for putting an excellent event.

You can see the photo gallery of the show floor at PCB West 2009 Pictures.

The video interviews were with DownStream, EMA Design Automation, Prototron Circuits, Oak-Mitsui and with Valor.  The world of PCB design continues to evolve as it meets the challenges of ever-higher signal frequencies, the need for more efficient and automated methods to create designs, and to improve collaboration.

All of these topics and more are covered in the PCB West 2009 Video Interviews.

Let me know your thoughts about PCBWest and the interviews.

+Graham

After a several week hiatus due to DAC at the end of July, and 10 days of vacation in Oregon and California,  this blog post returns.

First, all 44 DAC videos recorded by yours truly, are now up on EDACafe, after many hours of editing. There is even a ‘triple play’, with Tom Fitzpatrick, Stephen Bailey and Harry Foster of  Mentor.  See them all at DAC Videos.  Let me know what you think of them.

Secondly, David Heller, president of IBSystems (and all of the Cafés) went to Infineon Raceway as a guest of HP.  I recommend his article which is posted on EDACafe. You will see a cool car  and hear some amazingly LOUD engine noises from the embedded sound clip.  See it here.

And finally the half-thing is my oldest son turned 16 and is 6cm taller than me and still growing.  I wonder when it will stop!

+Graham