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Sanjay Gangal
Sanjay Gangal
Sanjay Gangal is a veteran of Electronics Design industry with over 25 years experience. He has previously worked at Mentor Graphics, Meta Software and Sun Microsystems. He has been contributing to EDACafe since 1999.

EDACafe Predictions 2025 – SiFive

 
January 13th, 2025 by Sanjay Gangal

By Ian Ferguson, Senior Director for Infrastructure Products, SiFive

Ian Ferguson

As compute requirements increase, we’re seeing a growing demand for optimized hardware that helps companies innovate faster and more efficiently. In this article, I’ve detailed several ways that this will play out in 2025, from chiplets to open source software, along with other key trends.

  • Chiplet deployments beyond data center/server use cases: Chiplets have become a common implementation strategy for high performance server chips. 2025 will be the year we start to see wider adoption of this technology to a broader set of applications, bringing the benefits of modularity, improved ROI and the ability to combine (in the same package) processing technology implemented in advanced process nodes with less aggressive process nodes for proven (previously certified) subsystems and analog functionality. There remains some skepticism about the use of chiplets in applications that demand high levels of safety such as vehicles and avionics; while progress is being made in those areas, it will be other sectors that lead the way. One of the interesting elements to track will be connectivity standards. In the server domain, the needs of connectivity have focused on performance and effective scaling up of processing capabilities. In these new markets, there will be more of a focus on cost and/or power minimization. For SiFive, what this means is exploration as part of a number of research programs around new types of power-efficient and cost-effective interconnects.

  • Feed the beast: In 2024 there was a lot of discussion around the capabilities of CPUs and GPGPUs. Many forget that these units are only effective if they are fed data. 2024 saw the public IPO for Astera Labs, a consortium led by AMD announcing UAlink, and Arm’s announcement of the chip to chip (C2C) architecture specification. Another interesting announcement came late in the year from Enfabrica with their compute fabric centered on effective connectivity between GPGPU-based servers. We will continue to see companies creating effective in-system and between-system bus architectures, high performance memory architectures and shifting of compute nearer to IO and memory with the overall objective of improving system throughput. For SiFive, as an IP provider, we start any IP development with a focus on the complete system. The implementation of optimized processing subsystems is then delivered in part by SiFive, and in part through deep engagements with its partners. Our alignment to the CHI bus protocol enables a diverse set of network interconnects, such as those from Arteris, to be embraced by mutual customers.
  • AI chip landscape: The cost of training today’s AI models is simply too high. The initial phase of AI focused on time to market as opposed to optimizing models for cost. There will be a shift towards optimization in 2025. The key to success here is less about building the perfect hardware architecture and more about finding a convenient and effective path for software to migrate from CUDA to a new thing. In general, AI hardware accelerators beyond those built by the hyperscalars have been unsuccessful. The best chance lies in building hardware that mimics a GPGPU like architecture. SiFive has vector processors integrated into a current set of its Intelligence processors. The next phase across RISC-V is driving a standard approach to implementing matrix engines.
  • EdgeAI: We will see a shift in interest from the data center to the edge. The cost, energy and footprint constraints here require new innovative thinking. One area to watch is in-memory processing of information. Moving data to/from memory remains one of the biggest challenges for performance and power and this is a true market changer if it can be built reliably and cost effectively. As the models support standard APIs, this is one area where we see customization of instruction sets as adding a step function in important metrics such as inferences per second / watt (or per dollar).
  • Open source continues to eat the world: This is not a new trend, but open source will continue to be adopted at the expense of proprietary technology across a diverse set of embedded use cases. Linux is becoming real-time enough for a wider set of use cases and there are very small footprint RTOSs for those use cases that need a smaller memory footprint. Unless your use case needs to reuse proven (certified) application software, open source should be your first port of call for your next project. SiFive was an original founder of the RISE project, a collaborative approach in the RISC-V community to optimize open source software for deployment on RISC-V based hardware. Much of this work in 2025 will be centered on the RVA23 profile, a standard set of instructions that application software can rely on to be present for the next set of high performance (out of order) processors emanating from a range of commercial and academic institutions.
  • Consolidation, acquisition and continued industry turbulence: Over the last few years, hardware has become cool again. 2025 will be a year of consolidation, with some of those companies going under and others that have been able to demonstrate a meaningful value prop being gobbled up by companies that see acquisition as the more expeditious way to fill a vital gap in their product portfolio. These dynamics, combined with ongoing geopolitical activities and other seismic events like litigation and pricing changes in the chip industry, will cause significant challenges for the companies that need to increase the resiliency of their supply channels. This is one of the strongest commercial value propositions that RISC-V offers a diverse set of industries: RISC-V is ideally suited for today’s dynamic computing era. 2025 will be the year that RISC-V technology builds on its strong foundation (with billions of RISC-V cores already deployed) in embedded applications and starts to show formative design wins in sockets where the RISC-V processor is running the main operating system and/or application. Ultimately this is great for the industry as increased competition will accelerate innovation and value to end customers.

About Author:

Ian Ferguson is the Senior Director for Infrastructure Products at SiFive, where he is responsible for accelerating growth of the company in that market segment. Prior to joining SiFive Ian worked at Lynx Software Technologies as the vice president of marketing at Lynx Software Technologies, responsible for all aspects of the outward-facing presence of the company to its customer, partner, press and analyst communities. Ian was a key part of the team that was responsible for selling the company to OceanSound Partners, a private equity firm. Ian also spent nearly 11 years at Arm, where he held various roles leading teams in vertical marketing, corporate marketing and strategic alliances. Ian is a graduate of Loughborough University (UK) with a bachelor’s degree in electrical and electrical engineering.

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Category: Industry Predictions

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