Roberto Frazzoli is a contributing editor to EDACafe and a seasoned freelance journalist specialized in electronics. His weekly contribution to EDACafe – since early 2019 - includes news updates, coverage of major industry events, special reports, and interviews. Prior to joining EDACafe, Roberto … More »
AI/ML-based optimization; free GPU and DLA IPs; easier I3C adoption
June 9th, 2022 by Roberto Frazzoli
According to Reuters reports on the impact of Ukraine war, more U.S. tech companies are leaving Russia: Microsoft is substantially cutting its activity in the country, while IBM is closing its Russian business and has started to lay off its employees. Russia, for its part, has limited exports of noble gases including neon – used in chip fabrication – until the end of 2022. Exports will be allowed only with special State permission. Let’s now move to our usual tech news round-up, starting with a brief update on TSMC’s roadmap: the Taiwanese foundry has reportedly chosen the nanosheet transistor architecture for its next 2-nanometer node starting in 2025. As for EDA, the use of artificial intelligence/machine learning in chip design is in the spotlight this week with two significant announcements.
Synopsys’ machine learning-based design optimization solution
Synopsys has introduced DesignDash, a design optimization solution based on machine learning and big data analytics. According to the company, DesignDash enhances design productivity in different ways: by providing real-time design status through visualizations and interactive dashboards; deploying deep analytics and machine learning to extract and reveal actionable understanding from vast volumes of structured and unstructured EDA metrics and tool-flow data; classifying design trends, identifying design limitations, providing guided root-cause analysis and delivering flow consumable, prescriptive resolutions. The solution complements the Synopsys SiliconDash product, part of the Synopsys Silicon Lifecycle Management Family.
Cadence’s AI-driven system optimization solution
Cadence has announced the Cadence Optimality Intelligent System Explorer, which enables multi-disciplinary analysis and optimization (MDAO) realization of electronic systems. According to the company, the new solution enables designers to quickly determine optimum electrical performance, avoiding suboptimal local minima and maxima, while mapping variations for additional consideration and exploration of the complete design space. Cadence claims that Optimality improves productivity by 10X on average when compared to manual, brute-force parametric table studies, with up to a 100X speedup on some designs. Clarity 3D Solver (3D electromagnetic analysis) and Sigrity X (signal integrity/power integrity analyses) are the first Cadence products to embrace Optimality Explorer. Cadence has also disclosed the results obtained by some of its customers using its AI-based Cerebrus Intelligent Chip Explorer: MediaTek shrank die area by 5% and reduced power by more than 6%, while Renesas achieved a 75% improvement in total negative slack on an advanced-node CPU design, and slashed the leakage power on a MCU design. More recent Cadence news include the introduction of the OnCloud SaaS and e‑commerce platform.
Ansys adds big data to PI and ESD tools
Ansys has released two new semiconductor products – Ansys Totem-SC and Ansys PathFinder-SC – for power integrity and electrostatic discharge reliability signoff, respectively. The improvement introduced by the new tools is their integration into the Ansys SeaScape big-data platform for distributed processing. According to the company, this results in a significant increase of speed and capacity in comparison to the existing Totem and PathFinder products.
Free access to select Imagination’s GPU and neural network accelerator IPs
Imagination Technologies has announced its Open Access program offering access for early-stage companies to select GPU and AI accelerator IP without any licensing costs. The program aims to lowering the barriers of entry to SoC design. Open Access includes four PowerVR Series8XE GPUs and three PowerVR Series3NX neural network accelerators. A software driver is supplied by Imagination, and compatible open-source drivers are now also available in the market. Imagination will also provide help through technical expertise, tools, and technical support. Partners that will leverage the Open Access program include Risc-V International Open Source Laboratory RIOS Lab, Silicon Catalyst, and imec.IC-link.
Renesas introduces I3C intelligent switch devices
Renesas has launched what it claims is the industry’s first family of I3C intelligent switch devices, targeting next generation server motherboards and other chassis- and rack-based infrastructure systems. The MIPI I3C bus is a scalable control bus interface for connecting peripherals to processor or other management controllers, offering several improvements compared to I2C. As Renesas explained in a press release, current system designs often use the legacy I2C protocol and simple FET switches to connect initiator and target devices on a motherboard. This approach cannot scale to I3C speeds, which fundamentally limits system management to the most rudimentary of capabilities. Renesas’ new I3C intelligent switch family allows expansion of two initiator (upstream) ports to four, eight or more target ports at max speed with full protocol awareness and compliance. The new Renesas family also provides seamless translation between I3C and I2C devices allowing plug and play compatibility of legacy devices onto the control plane network. The new chips also support heterogeneous designs by providing IO level shifting and protocol translation for mixed I2C/SMBus and I3C networks. The I3C Intelligent switch is a result of collaboration between Renesas and Intel teams.
Allegro MicroSystems, a supplier of sensing and power semiconductor solutions, has entered into an agreement to acquire Heyday Integrated Circuits (Grasse, France), a privately-held company specializing in compact, fully-integrated isolated gate drivers for high-voltage gallium nitride and silicon carbide semiconductor designs. Allegro will pay approximately $19 million in cash.
Semiconductor test equipment supplier Advantest has entered into an agreement to acquire Italy-based CREA – Collaudi Elettronici Automatizzati, a supplier of power semiconductor test equipment.
Renesas will acquire Reality AI (Columbia, Maryland), a provider of embedded AI solutions, in an all-cash transaction. Reality AI offers a range of embedded AI and TinyML solutions for non-visual sensing in automotive, industrial and commercial products. Significant applications include industrial anomaly detection and automotive sound recognition. The company’s AI’s flagship Reality AI Tools is a software environment supporting the full product development lifecycle.
MIPI Member Meeting Europe will take place in Munich, Germany, from June 13 to 17. The event will include an I3C Interop Workshop, scheduled for June 13 and 14.
Frontiers of Characterization & Metrology for Nanoelectronics (FCMN) will take place from June 20 to 23 in Monterey, CA.
Sensors Converge will run from June 27 to 29 in San Jose, CA, along with co-located events.
International Interconnect Technology Conference (IITC) is scheduled from June 27 to 30 in San Jose, CA.