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Archive for June 17th, 2021

Intel reportedly interested in SiFive; Google’s AI-based chip floorplanning; TSMC roadmap; acquisitions

Thursday, June 17th, 2021

Acquisitions stand out in this week’s news roundup, catching up on some of the updates from the last fifteen days or so. But first, some interesting news about the evolution of the processor industry landscape, the use of deep learning in chip design, and foundry roadmaps.

Intel reportedly considering SiFive acquisition

The Nvidia-Arm deal – still under regulatory scrutiny – and the recent appointment of Pat Gelsinger as new Intel CEO are two factors that keep shaking the processor industry. Intel is reportedly considering the acquisition of SiFive, in a move that would enable the Santa Clara giant to add a rich portfolio of Risc-V-based IP, an open-source alternative to Arm. As noted in another report, with the acquisition Intel would also gain a software boost thanks to SiFive experts such as Chris Lattner. Meanwhile, concerns about the Nvidia-Arm deal start to emerge publicly. Qualcomm President Cristiano Amon has reportedly said that – in case SoftBank decides to launch an IPO for Arm – his company and many others would be interested in buying a stake.

Cristiano Amon. Credit: Qualcomm

Google’s research work on deep learning-based chip floorplanning: updates

Preceded in April 2020 by a preprint posted on the online arXiv repository, the paper from Azalia Mirhoseini and other Google researchers about deep learning- based chip floorplanning has recently been published by Nature magazine – with the addition of methods that improve results and that have been used in production to design the next generation of Google TPUs. One year after preprint, the topic cannot be considered ‘news’ anymore – but it’s definitely worth attention. Quoting from the paper abstract: “In under six hours, our method automatically generates chip floorplans that are superior or comparable to those produced by humans in all key metrics, including power consumption, performance and chip area.

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