Open side-bar Menu
 EDACafe Editorial

Archive for March, 2021

Intel announces two new U.S. fabs and launches its own foundry business

Thursday, March 25th, 2021

Just a couple of months after taking office, Intel’s new CEO Pat Gelsinger delivered on the expectations of a quick strategy change – and his plan caught many observers by surprise. Investors who had suggested Intel to embrace the fabless model will probably be disappointed, as Gelsinger – speaking at a webcast event on March 23 – announced just the opposite: not only will Intel increase its manufacturing capability, but it will also create a foundry business on its own. Gelsinger’s bold move resonates very well with the current climate characterized by geopolitical tensions, incentives from the Biden administration, and a severe chip shortage. However, turning his plan into reality might prove to be difficult, according to some observers.

Intel CEO Pat Gelsinger (Credit: Walden Kirsch/Intel Corporation)

A renewed technological self-confidence

One of the key elements of Intel’s new course is a renewed confidence in its internal technological capabilities. The company expects to continue manufacturing the majority of its products internally, and – as stated in a press release – the 7nm development is progressing well, driven by increased use of extreme ultraviolet lithography. Intel expects to tape out the compute tile for its first 7nm client CPU (code-named “Meteor Lake”) in the second quarter of this year. During the webcast, Intel officers reportedly did not directly address the issue of catching up with the leading foundries – as far as the 5nm and 3nm nodes are concerned. However, Gelsinger reportedly offered an explanation for Intel’s delay in moving to the most advanced process nodes: he said the company was too cautious about EUV lithography equipment and, to compensate, the designs got excessively complicated, leading to production problems. Gelsinger also announced a new research collaboration with IBM focused on creating next-generation logic and packaging technologies, which should clearly help Intel to catch up quickly. The internal capabilities on which the company is relying to fuel its new course include its expertise in advanced packaging technologies for chiplet-based devices.

(more…)

China news; Cadence Sigrity X; DARPA initiatives; AI in process control; Northvolt-Volkswagen deal

Thursday, March 18th, 2021

News from the rapidly evolving Chinese semiconductor industry open our roundup this week. More updates span across EDA, U.S. defense research, chip manufacturing, and electric vehicles.

China semiconductors updates: Baidu, ByteDance, CSIA

Chinese Internet giant Baidu has reportedly said that its artificial intelligence chip unit Kunlun has recently completed a fundraising round, which values the business at about $2 billion. According to the same source, Baidu is considering commercializing its AI chip design capabilities, with the aim of making the Kunlun unit a standalone company.

Another important Chinese Internet player, ByteDance, has reportedly begun hiring employees for semiconductor-related job openings. The company – best known for its TikTok app – confirmed it is exploring initiatives in this area, including the development of Arm-based server chips. According to another press report, ByteDance has also established a team to explore the development of artificial intelligence chips.

Semiconductor-related initiatives from companies like Baidu and ByteDance fit into a context where the Chinese government is playing an important role. During the recent National People’s Congress, the government reportedly committed to boost spending and research in advanced chips and artificial intelligence, to reduce reliance on foreign technologies.

In fact – as noted by market research firm IC Insights – despite being the largest consuming country for ICs since 2005, China still holds a small share as a producer. Of the $143.4 billion worth of ICs sold in China in 2020, only 15.9% was produced in China. Of that amount, China-headquartered companies produced only 5.9%.

Despite this scenario of increased international competition, the U.S. and Chinese industry groups have launched a collaboration initiative. The China Semiconductor Industry Association (CSIA) reportedly said in a recent statement on its website that it will form a working group with the U.S. Semiconductor Industry Association (SIA). According to the statement, ten chip companies from each nation will meet twice a year to discuss topics ranging from export policies to supply-chain safety and encryption technology.

(more…)

Vitis HLS now open source; an OS to manage SoC test; advancements in FD-SOI, EUV litho and DSA; AI chip updates

Thursday, March 11th, 2021

Catching up on some of the news from the last couple of weeks or so, let’s start with a recent update concerning Apple: the company is reportedly planning to build a new semiconductor design center in Munich, Germany, as part of a 1 $1.2 billion investment push to develop custom chips for 5G mobile and other wireless technologies. According to the report, Apple plans to move into the facility in late 2022 and plans to hire hundreds of people.

Xilinx Vitis HLS front-end is now open source

Xilinx has made the decision of opening access to the front-end of Vitis HLS (high level synthesis) on GitHub. The Vitis HLS tool allows C, C++, and OpenCL functions to be deployed onto the device logic fabric and RAM/DSP blocks. Making the Vitis HLS front-end available on GitHub enables developers to tap into the technology and modify it for the specific needs of their applications.

(more…)

Special Report: Machine Learning in EDA

Thursday, March 4th, 2021

EDA’s love affair with neural networks is cemented by elective affinities and made unique by the depth and breadth of the challenges

 

From logic synthesis down to the post-tapeout flow, machine learning has already made inroads in a wide range of EDA tools, enabling shorter turnaround times for chip designs, improving PPA results, and reducing the need for hardware resources across the design cycle. While disruptive advancements are all but unexpected when neural networks come into play, there seems to be something unique in the relationship between Electronic Design Automation and machine learning. On the one hand, it looks like the EDA industry is particularly well equipped to take advantage of the potential of neural networks; on the other hand, the difficulty and diversity of EDA challenges impose the use of several different machine learning solutions, contributing to a uniquely complex ML-enabled flow.

Solving hard problems is business as usual

One aspect that immediately stands out when addressing this subject is the way EDA experts have approached the innovations brought about by neural networks. While they undoubtedly consider machine learning as a disruptive technology enabling exciting results, on the other hand they see neural networks as a natural continuation of what EDA companies have always been doing: writing advanced software to solve hard problems.

“Machine learning is changing the world of software, not just EDA, it’s the next evolution in algorithms,” says Paul Cunningham, Corporate Vice President and General Manager at Cadence. “Our business is complex software, so the math and the computer science behind neural networks and Bayesian methods, all of these deep complex techniques inside machine learning, this is all just very normal for us. We are doing this all the time anyway, this is the software that we write,” he continues. “We have all the experts, there is no problem for us to write the [machine learning] algorithms just from scratch.”

Paul Cunningham. Credit: Cadence

Another reason why machine learning – despite being such a disruptive technology – can be considered a sort of natural development for EDA is that in many tools the new ML-based algorithms are replacing pre-existing traditional heuristic in a way that is invisible to the user. In these cases, “It’s just as using machine learning as a better heuristic,” says Cunningham. “We may have some expert system inside, some other way to take a decision, some rule-based method, and we are now using a neural network-based method for the heuristic, so the customer has no visibility.”

(more…)

Verific: SystemVerilog & VHDL Parsers
True Circuits DDR PHY



© 2022 Internet Business Systems, Inc.
670 Aberdeen Way, Milpitas, CA 95035
+1 (408) 882-6554 — Contact Us, or visit our other sites:
TechJobsCafe - Technical Jobs and Resumes EDACafe - Electronic Design Automation GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise