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 Bridging the Frontier
Bob Smith, Executive Director
Bob Smith, Executive Director
Bob Smith is Executive Director of the ESD Alliance responsible for its management and operations. Previously, Bob was senior vice president of Marketing and Business Development at Uniquify, responsible for brand development, positioning, strategy and business development activities. Bob began his … More »

Chip Design Verification Community’s Travel to San Jose for DVCon

March 5th, 2018 by Bob Smith, Executive Director

DVCon is a yearly gathering of the chip design verification community held at the DoubleTree Hotel in San Jose. I’m certain its organizers and steering committee are pleased with attendance, the program, the exhibit floor and the opportunity for attendees to network. The mood was serious and intent on learning –– after all, chip design verification is a huge and complex problem. Nonetheless, everyone was in great spirits.

According to a post-conference news release: “Overall attendance, including exhibit-only and technical conference attendees, was 836.  Attendance was further enhanced by 241 exhibitor personnel that also had access to the panel sessions and keynote address, for a total of 1,077 participants. ”

The ESD Alliance was there and talked with the enthusiastic and energized community of chip design verification experts and aficionados, including vendors on the exhibit floor. Don’t take my word for it. Instead, check out a few photos of our member companies’ booths and the many of their staffers.

Verific’s COO Michiel Ligthart is standing in front of the company mascot, a giraffe. Why a giraffe, you might wonder? Have you noticed how tall many of the Verific employees are? Or, is it because Verific’s SystemVerilog, Verilog, VHDL and UPF Parser Platforms stand head and shoulders above the rest?

OneSpin’s Product Manager Sven Beyer (left) and Sasa Stamenkovic, senior FAE, are ready to talk about its recent announcement –– completion of a series of factory inspections and audits of its organization and tool development by internationally recognized testing body TÜV SÜD. The first Tool Qualification Kit is available for OneSpin 360 EC-FPGA, an automatic sequential equivalence checker for FPGA design.

Maheen Hamid (right), Breker’s co-founder and CFO, chats with an attendee about Breker’s Portable Stimulus offering. Portable Stimulus is topical these days and no more so than DVCon as the program included a tutorial and a lively panel session. Several other vendors also showed demos of their offering on the exhibit floor.

Runtime, now part of Altair, is an expert on workload scheduling and the experts were there to answer questions and offer demos. They are, from left to right: Chau Papatheodorou and Corey Fleisher, area sales managers, Andrea Casotto, Runtime’s founder and now chief scientist at Altair, Tiffany Quan, sales and marketing operations manager, Jim Cantele, vice president of worldwide sales, and Stuart Taylor, director of solutions architecture.

AMIQ is one of the ESD Alliance’s newest members. We welcome AMIQ’s founder and CEO Cristian Amitroaie and Irina Tica, an R&D engineer at AMIQ.

Long-time ESD Alliance Member Real Intent covers the functional verification landscape from early stages through sign-off. DVCon attendees were able to ask Marketing Manager Bhaskar Singha for details.

Blue Pearl’s Visual Verification Suite was on display at DVCon. There to answer questions or give product demos are (from left to right): Trish Kendrick, sales manager, Jenn Treiber, director of operations, Ellis Smith, CEO, Jerry Phillippe, sales manager, and Gunjan Mamania, sales AE.
Bill Gascoyne from Blue Pearl’s R&D group was visiting, but not working the booth.

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