By Pascal Chauvet
Today’s multi-billion-transistor system-on-chip (SoC) devices are composed of hundreds of functional intellectual property (IP) blocks. The creation of SoCs is typically a combination of acquired IP blocks from trusted third-party vendors and a few internally developed IP blocks containing the secret sauce that differentiates the design from competitive offerings.
Third-party IPs may include central processing units, graphics processing units, memory subsystems, dynamic memory access controllers, external memory controllers and communications functions such as Ethernet, USB and MIPI. Internally developed IPs may include hardware accelerators and machine learning inference engines.
The different IP blocks must be carefully integrated for the device to work properly. SoC integration is the process of gathering all of these IPs together to form a complete device, but this involves much more than simply plugging them into each other like the pieces of a jigsaw puzzle. SoC integration is challenging, involves hidden complexity and is prone to errors.
Designers consistently integrate diverse content from multiple sources while collaborating with teams across various sites with limited cross-team synergy. A large variety of their tasks necessitates a significant amount of manual operations. Because of these challenges, designs are delayed and schedules slip, leading to missed time-to-market and time-to-revenue goals.
