IPD – Chip Design Meets Model-Based Systems Engineering Arteris IP

Chip designers build circuits that go into larger systems, often extensive ones such as cars, aircraft, ships, satellites and spacecraft. How are those designed, and how do those constraints interact with the implementation of sub-components, like an embedded system?

For many years, the answer was through the exchange of documents – high-level specifications, requirements and key performance indicators. In 2007, the international council on systems engineering (INCOSE) introduced an initiative called model-based systems engineering (MBSE) to formalize the application of modeling to support all phases of system design, from concept through development and later lifecycle phases. The use of this approach is now common in aerospace development. It is also taking off in automotive design and gaining recognition in large-scale infrastructure projects – public works, utilities, airports and seaports. This means it is increasingly likely that new products are aimed at platforms already using or planning to adopt MBSE.

SysML Modeling, From Systems Design to Component Design

System designers must think about the whole system project – mechanical, environmental, software, electronic components and more. These designs cannot be fully represented in C, mechanical CAD drawings or register-transfer level (RTL) language. Instead, unified modeling language (UML) might be a better choice to use, but that is very software-centric. Another popular option, though, is systems modeling language (SysML). SysML is an extension of a subset of UML for systems engineering that eliminates software-only features and adds support for more general needs, requirements, parametrics and modeling. This is now published as an ISO standard (ISO/IEC 19514:2017) and has become a central component of MBSE.

There are different possible levels of engagement with the standard. These start from simply drawing pictures to adding to the pile of documentation to simulation-ready models that can be used to check foundational design artifacts like the completeness and correctness of state machines and architecture diagrams. This higher level of abstraction and engagement is where it gets interesting for embedded design. These models are known as the single source of truth for system, software, chip, mechanical and other design teams. There are now multiple tools supporting this model.

Implications for Embedded Design

In this world, the specification for an embedded function is a view of the SysML model appropriate to that purpose, plus some collateral information that does not yet have a home in the standard. This could include high-level behavioral models, use-cases and verification expectations, for example.

These concepts may already be quite familiar to software developers, especially for anyone working with UML. What is new and exciting is that the same ideas can also be valuable for hardware designers who are open to change. These engineers are already working with requirements, models and use-cases in some form. SysML models standardize much of that format, which is always a good thing.

Moreover, collaboration between builders and integrators now commonly extends down into the hardware architecture. This requires an approach to system-on-chip (SoC) design that is compatible with SysML and MBSE objectives. Several companies and institutions have already recognized synergies between SysML and IP-XACT for this purpose around requirements, structure constraints and behaviors. For SysML implementation, IP-XACT modeling of hardware/software interfaces at the intellectual property (IP) and chip levels is especially valuable. This will be handled most easily, especially in support of traceability, in an IP-XACT-based flow.

Arteris IP Is MBSE-Ready

Arteris IP already has collaborations on SysML/MBSE flows with several companies in the automotive value chain. Based on this work, there are several additional areas for executable linkages between the high-level model and the chip design. If this sounds relevant to your needs, contact Arteris IP.

Category: SOC

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