Posts Tagged ‘Zynq’
Friday, March 12th, 2021
 While immunization vaccines are rolling out at an impressive pace, and as society slowly reopens, our best defense against the Coronavirus continues to be early detection and rapid response (such as self-isolation).
An early symptom of having the virus is an increased body temperature, which can be easily measured using contactless methods such as thermal sensors or cameras sensitive to IR radiation.
However, general purpose cameras still have a role to play – in augmenting and putting into better context the thermal data.
Imagine two cameras – one IR and one standard – observing the entrance to a place of work or indoor public venue. If the image captured by the standard camera feeds a system with face detection software, then the thermal image can be made more meaningful: yes, that heat source is a human face.
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Tags: AI, Computer Vision, COVID-19, embedded, FPGA, Gstreamer, IR, Linux, MPSoC, Zynq
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Wednesday, February 19th, 2020
Have you ever worked on a group project where you had to combine your work with that of a colleague of a different engineering discipline but the absence of an efficient means of doing so affected the project’s overall outcome? Well, for software and hardware engineers developing an SoC, the merging of their respective engineering efforts for verification purposes is a big challenge.
Early access to hardware-software co-verification allows hardware and software teams to work concurrently and set the foundation to a successful SoC project. However, many co-emulation methodologies are based on processor virtual models which are not accurate representations of the design. Fortunately, Aldec has a solution that integrates an ARM-based SoC from Xilinx, specifically a Zynq UltraScale+ MPSoC, with the largest Xilinx UltraScale FPGA. Since the Zynq device includes the hard IP of the ARM processor, our solution provides an accurate representation of the ARM-based SoC design for co-verification.
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Tags: ARM, asic, embedded, Emulation, FPGA, HES-DVM, SoC, SoC and ASIC Prototyping, Validation, verification, Zynq
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Thursday, September 14th, 2017
 Imagine traveling back in the time to the early human ages. It’s going to be both scary and interesting when you meet a person who probably cannot speak or if they do you won’t be able to understand them. Clearly, communication will not be possible until you find a mutual way to convey your respective meanings/intentions. The same principle applies in the world of electronics as there are various types of interfaces among electronic devices. Therefore, a standard communication protocol eases the transformation of data in a system, especially in a System-on-Chip (SoC) system which consists of different systems.
SoC FPGAs such as Xilinx® Zynq™ establishes the ARM Advanced Microcontroller Bus Architecture (AMBA) as the on-chip interconnection standard to connect and manage the functional blocks within the SoC design. The Advanced eXtensible Interface (AXI) is designed for FPGAs based on AMBA as a protocol for communication between blocks of IP.
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Tags: Accelerator coherency port, ARM, AXI interconnection, AXI Lite, AXI memory map, AXI stream, embedded, FPGA, General purpose interface, High Performance interface, SoC, TySOM, Xilinx, Zynq
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Wednesday, August 17th, 2016
Today’s article is authored by Zach Nelson, Aldec FAE Intern. Zach is a Field Application Engineer Intern with Aldec, working in tandem with his fellow interns to develop hardware specific applications. He is set to graduate with a B.S. in Electrical Engineering from University of Nevada, Las Vegas in 2017. His field interests include ASIC Design & Solid State Electronics.
It’s time for Universities to say goodbye to their outdated FPGA boards and introduce the Xilinx® Zynq™ chip. The Zynq chip is a device which combines an FPGA fabric with a processing unit. The Zynq chip is very similar to other FPGA devices, but it does have a few key advantages and features that can enhance your designs and increase its capabilities.
What can Zynq do?
The Zynq chip has applications in the design fields related to:
- FPGA
- Digital Design
- VHDL/Verilog
- Embedded Systems
- Robotics
- IoT
- Factory Automation
- Algorithm Implementations
- Signal Processing
- Video/Image Processing
FPGA
The Programmable-Logic can be used in isolation of the processor which allows it to be used like a general FPGA device which can help support the topics covered in any VHDL/Verilog class as well as Digital Design. It is much easier to facilitate growth and learning in a project-based curiculum when you have a device such as the Zynq to interface with.
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Tags: Active-HDL, Aldec, embedded, FPGA, Xilinx, Zynq
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Monday, July 8th, 2013
HW/SW Emulation and Functional Verification of Xilinx FPGAs
 As an Aldec Hardware Product Manager, I make the quick flight from our home base in Las Vegas to San Jose pretty regularly. This week, I’ll be joining Aldec Software Product Manager, Dmitry Melnik, as we head out to attend “Smarter 2013”, Xilinx’ annual Technical Sales Conference.
Since Aldec is a Xilinx Alliance Member, we have been invited to showcase our solutions at their conference’s Partner Night. Working closely with key technology partnerships like Xilinx has long been the cornerstone to Aldec’s success. Our mutual customers have benefited from these alliances, the result of hard work, open communication and close interaction between our teams.
Most recently, we’ve been syncing with our counterparts at Xilinx to fulfill the verification requirements of the newest SoC designs, as Aldec provides EDA solutions at every stage of development. Users can leverage the latest Xilinx ISE and Vivado design suites to simulate and verify designs in Aldec Active-HDL and Riviera-PRO, or incorporate Aldec FPGA-based prototyping boards utilizing Virtex-7 FPGAs for hardware emulation and SoC prototyping.
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Tags: FPGA, FPGA Simulation, Functional Verification, Hardware Emulation, Hardware-Assisted Verification, HES, Riviera-PRO, SoC, SoC and ASIC Prototyping, Virtex-7, Xilinx, Zynq
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While immunization vaccines are rolling out at an impressive pace, and as society slowly reopens, our best defense against the Coronavirus continues to be early detection and rapid response (such as self-isolation).
