Aldec Design and Verification
Krzysztof joined Aldec in 2001 and was a key member of the team that developed HES-DVM™, Aldec's FPGA-based simulation acceleration and emulation technology. He has worked in the fields of HDL IP-core verification, testbench automation and design verification for DO-254 compliance gaining … More »
Emulation on the Cloud: HES Cloud delivers access to a high performance emulation platform
June 15th, 2017 by Krzysztof Szczur
‘The cloud’ has been an industry buzz word for some time now and whilst the initial focus was on data storage and sharing – and spawned the likes of Dropbox – ‘cloud computing’ is currently the latest trend. For instance, Amazon’s cloud platform, Amazon Web Services (AWS), gives users access to servers and a range of applications. Storage is available as before but so too now are dedicated relational databases; which in Amazon’s case is provides through a different service.
Enterprise businesses are taking advantage of cloud computing platforms, and for a number reasons. These include pay-as-go (as opposed to investing considerable cap ex), speed and flexibility (resources and storage can be made available quickly), and one is spared the headache of maintaining a mass of IT hardware and keeping on top of software license renewals.
Also, earlier this year Amazon announced EC2 (Elastic Compute Cloud) F1, a compute instance with FPGAs that users can program to perform hardware accelerations. The F1 instance includes an FPGA developer Amazon Machine Image (AMI) which includes a development environment with scripts and tools for code compilation and design simulation.
It is expected the primary users of EC2 F1 will be software developers, working on complex and compute-intensive algorithms for which FPGAs lend themselves particularly well. For instance, High Performance Computing will increasingly exploit FPGA technology.
But let’s not forget one of the most important roles that FPGAs have been playing in our industry – EDA – for a number of decades: hardware acceleration for ASIC prototyping purposes.
As designs grow in size and complexity, verification emphasis shifts from simulation to emulation; noting that HDL simulation still has a key role to play in the early verification stages of an ASIC or SoC project.
Aldec launched its first FPGA-based hardware emulation platform, HES, in 2003. Shortly afterwards, the company introduced HES-DVM, an automated and scalable hybrid verification environment for SoC and ASIC designs. It began life mainly as a means of performing HDL simulation acceleration flows but it has since evolved into a hybrid verification environment; through the addition of co-emulation standards like Accellera SCE-MI and TLM. Accordingly, in addition to HES-DVM being of use to hardware engineers it is also giving software designers the earliest possible access to prototype hardware.
Aldec officially entered the SoC/ASIC prototyping market in 2012 with the launch of its HES-7 boards, which utilise Virtex-7 and Virtex UltraScale FPGAs and which can be interconnected to provide up to 663million ASIC gates.
These HES products are proving extremely popular with ASIC design houses; who can justify the investment on the basis that the platforms will be in regular use. For smaller companies though the investment is much harder to justify and puts them between a rock and a hard place. Emulation costs. But without it the functionality of their designs will be heavily reliant on simulation, which could delay product launch.
With FPGAs already making their way onto the cloud for other hardware acceleration tasks – provided as pay-as-you-use services – it is logical for these versatile devices to be available for ASIC emulation too. To this end, Aldec will be announcing at DAC 2017 that its HES technology is to be made available on the cloud via Amazon’s AWS.
Essentially, HES-DVM will be accessible remotely and can be leased for the emulation of hardware and/or the design verification of pre-silicon software. Also available as part of the same service will be Riviera-PRO, Aldec’s advanced functional verification platform. It will feature extensive simulation optimization algorithms to achieve high performance in VHDL, Verilog, System Verilog, System C and mixed language simulations, and it will also support the latest verification libraries, including UVM.
As mentioned, HES-DVM is all about hardware and software design and verification, through simulation acceleration and transaction-level emulation with the hardware/software interfaces and infrastructure based on SCE-MI.
In Amazon’s AWS, users will have access to Aldec’s HES Cloud. They will be able to login using Secure SSH protocol using either a terminal or a graphical desktop. It will then be possible to use the AMI to prepare a design for emulation. When that is done the user will then be able to connect via secure VPN to a HES Server based in Aldec’s facility and which will comprise a number of HES boards on which the emulations will run.
Whilst Amazon’s FPGA Developer AMI is undoubtedly geared for hardware acceleration – within a variety of emerging markets – HES Cloud effectively provides remote access to a high performance emulation platform and a functional verification tool which are both geared for the highly specialized task of ASIC and SoC emulation.
Tags: Emulation, FPGA-based hardware emulation platform, hardware, Hardware Emulation, HES-DVM, mixed language simulations, system c, system verilog, utilise Virtex-7, verilog, VHDL, Virtex UltraScale FPGAs, Virtex-7