The CC-100 IP is a decoupling capacitor with a Cybersecurity Enhancement and an Energy Harvesting twist. The IP not only does a better job of on chip supply line filtering, showing at least a 2X improvement in effective capacitance per unit area with respect to typical on-chip MOS decoupling capacitors, with an added 25% reduction in capacitor effective series inductance (ESL). The IP feeds back a portion (nominally 20%) of the bypass current flowing through on chip decoupling capacitors onto the chip power grid, thus reducing overall chip dynamic power draw. These effects substantially reduce RF Emissions from chip power grids making systems less vulnerable to cyber hacking and more secure. The IP draws no current for operation, thus maximizing block efficiency.
The IP is meant to replace on chip decoupling capacitors, thus can be shaped into various aspect ratios and sizes to fit on-chip “white space”, the area under power grids, etc. in the same fashion as typical on-chip decoupling capacitors. In similar fashion to typical decoupling capacitors, the IP blocks can be connected in parallel to increase overall RF emission reduction, reservoir capability, and effective capacitance.