Provides an integrated, verified, AMBA® 4.0 compliant, AXI Multi-layer bus hardware/software system ready for deploying complex applications using processors such as the BA2x line or ARM Cortex-A5 class processors.
With a suitable processor and memory devices, this subsystem is ready for applications that target complex devices needing both higher performance and perhaps multiprocessing. The subsystem can perform digtial signal procssing, spectral analysis, or complex system control along with moving data efficiently using multiple DMA channels. It also handles complex system-level communications while supporting advanced operating systems such as Android or Linux.
The Custom Perfromance AXI Subsystem combines peripheral and interface IP cores with drivers and other essential software and an AXI multi-layer bus infrastructure. It is designed to work well with the user’s choice of AMBA® 4.0 AXI compliant processor, and has been specifically tested with those from CAST and ARM.
An ingegrated QSPI core allows the subsystem to boot efficiently using standard external QSPI Flash memory from companies such as Winbond and Spansion. The QSPI Execute in Place (XIP) feature allows the subsystem to use smaller on-chip SRAM with the processor fetching instructions directly from off-chip Flash memory (especially efficient when using L1 or L2 cache).
The subsystem includes a package of standard APB peripherals: I2C, SPI, UART, and GPIO interfaces, plus a Timer and Watchdog Timer. An AHB-APB Bridge interfaces these with the AHB bus, on which resides included SSRAM and Flash Memory Controllers, the user’s processor core, and any additional CAST or third-party IP cores desired. An Interrupt Controller is also available.
All the included cores are supported with C code drivers and comprehensive tests.
An integrated Power Management System provides an effective means to minimize power consumption for each specific application.