TAB members include the following:
- Giovanni De Micheli, PhD, professor and director of the Integrated Systems Center at Ecole Polytechnique Fédérale de Lausanne, Switzerland, and president of the Scientific Committee of CSEM, Neuchatel, Switzerland. De Micheli is chairman of Certess’ TAB.
- David Dill, professor of computer science and, by courtesy, electrical engineering at Stanford University.
- Richard DeMillo, John P. Imlay dean and distinguished professor of computing at the Georgia Institute of Technology.
- Franco Fummi, PhD, full professor in the information department at the University of Verona, Italy.
- Frank Ghenassia, MsC, director of the system platforms group at STMicroelectronics in Grenoble, France.
- Ahmed Amine Jerraya, PhD, acting head of design programs for DCIS (Advanced Design And Systems Division) at CEA/LETI (Commissariat à l’énergie atomique / Laboratoire d’électronique et de technologie de l’information).
- Jeff Offutt, PhD, professor of software engineering, George Mason University, Fairfax, VA.
“Functional qualification enables design teams to integrate SoC designs much more quickly and predictably than current processes,” said Michel Courtoy, president and CEO of Certess. “We are honored to have this group of experts join us to help guide development of products that will enable design teams to improve their productivity and the predictability of their project schedules, which are currently dominated by the verification task.”
About the TAB Members
Dr. Giovanni De Micheli holds a nuclear engineer degree from the Politecnico di Milano, Italy, and MS and PhD degrees in Electrical Engineering and Computer Science from the University of California at Berkeley. His research interests include several aspects of design technologies for ICs and SoCs, including synthesis, hardware/software co-design and low-power design, as well as systems on heterogeneous platforms including electrical, optical, micromechanical and biological components. He is the recipient of the 2003 IEEE Emanuel Piore Award for Contributions to computer-aided synthesis of digital systems and a Fellow of ACM and IEEE.
Dr. David L. Dill has research interests in a variety of areas, including computational systems biology and the theory and application of formal verification techniques to system designs, including hardware, protocols, and software. From July 1995 to September 1996, he was chief scientist at 0-In Design Automation. He is a fellow of the Institute for Electrical and Electronic Engineers and a fellow of the Association for the Computing Machinery. He has an S.B. in electrical engineering and computer science from Massachusetts Institute of Technology, and an M.S and Ph.D. from Carnegie-Mellon University.
Dr. Rich DeMillo returned to academia in 2002, after a career as an executive in industry and government. His industry experience included Hewlett-Packard, where he was chief technology officer with worldwide responsibility for technology and technology strategy. His present research interests are focused on information security and the creation of a new field of study devoted to the Web. He has served on the board of directors for numerous public and private companies as well as non-profit and philanthropic organizations. Shortly after September 11, 2001, at the request of Intel CEO Craig Barrett and HP CEO Carly Fiorina, Rich and Intel CTO Pat Gelsinger formed the IT Industry Computer Security Working Group, a cross-industry steering committee aimed at identifying significant gaps in the nation’s cyber infrastructure that could be addressed by enhanced R&D and product development. He is co-inventor of mutation testing, the technology upon which Certess is based, a co-inventor of fault-based cryptanalysis, and is a Fellow of both the Association for Computing Machinery and the American Association for the Advancement of Science.
Dr. Franco Fummi’s main research interests concern synthesis of testable VLSI designs, test pattern generations, hardware description languages and system verification. He has published more than one hundred and sixty papers in the EDA field; two of them received the best paper awards respectively at IEEE EURODAC 1996 and IEEE DATE 1999. Fummi is an IEEE member and a member of the IEEE test technology technical council. A full professor in the Dipartimento di Informatica of Università di Verona, Fummi received the laurea degree in electronic engineering and the PhD in electronic engineering from Politecnico di Milano, Italy.
Frank Ghenassia focuses on IP/SOC verification, architecture definition and platform automation as well as embedded software development based on high-level modeling approaches. Ghenassia joined STMicroelectronics in 1995 and has worked on operating system development, software debugger development, and system-to-RTL design flow activity during his time at the company. He graduated from engineering school in France and received his Master of Science degree in electrical engineering in Israel.
Dr. Ahmed Amine Jerraya received his engineering degree from the University of Tunis and the Docteur Ingénieur and the Docteur d'Etat degrees from the University of Grenoble, France, all in computer sciences. In February 2007, he joined CEA/LETI, where he is acting head of design programs for the DCIS division. He served as general chair for IEEE DATE in 2001 and has co-authored eight books and published more than 200 papers in international conferences and journals. Jerraya received the best paper award at the 1994 ED&TC for his work on hardware/software co-simulation.
Dr. Jeff Offutt is editor-in-chief of Wiley’s journal of Software Testing, Verification and Reliability, chairs the steering committee for IEEE International Conference on Software Testing, Verification, and Validation, is on the editorial boards for the Empirical Software Engineering Journal, the Journal of Software and Systems Modeling, and the Software Quality Journal, and is program chair for ICST 2009. Offutt received a PhD degree in Computer Science from the Georgia Institute of Technology.
About Certess
Certess, Inc. is the only electronic design automation company providing functional qualification products for companies that create and integrate complex design blocks or intellectual property (IP). The company’s technology provides design and verification engineers with an objective way to evaluate and improve the completeness of the verification environment, resulting in a shorter and more predictable process to integrate SoC designs and ensure high quality designs. The company is headquartered in Campbell, CA. For additional information, see www.certess.com.
Certess and Certitude are trademarks of Certess, Inc.
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