ClioSoft to Demonstrate Design and IP Management at CDN Live Worldwide throughout 2016
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ClioSoft to Demonstrate Design and IP Management at CDN Live Worldwide throughout 2016

ClioSoft client Active-Semi® to present on International Design Data Management and Collaboration at CDN Live Silicon Valley

FREMONT, Calif., March 31, 2016 –ClioSoft, Inc., a leader in system-on-chip (SoC) design and intellectual property (IP) management solutions for the semiconductor design industry, will showcase its products at CDN Live events in all locations throughout 2016. The company will demonstrate how the tight coupling of its SOS7 design management platform with Cadence® Virtuoso® empowers design engineers to manage mixed-signal design data directly from the Virtuoso cockpit. This integration enables design teams to be more efficient and productive while reducing the possibility of design re-spins due to incorrect configurations. 

ClioSoft’s SOS7 design and IP management platform is integrated with tools from various EDA vendors, providing a cohesive design environment for all types of digital, analog, RF and mixed-signal designs. SOS facilitates multi-site design collaboration and includes, among other features, integrated revision control, release and derivative management, and interfaces to commonly-used bug tracking systems.

At CDN Live events, ClioSoft also will demonstrate Visual Design Diff ( VDD) software, which enables users to quickly compare design differences in schematics, layout and RTL by graphically highlighting the differences. A hierarchical diff option allows all differences for the entire design hierarchy below the selected view to be flagged.

To see the entire calendar of events for ClioSoft at CDN Live worldwide, see http://www.cliosoft.com/marketing/tradeshows/cdnlive/

Active-Semi Presentation at CDN Live Silicon Valley

Session Title:  International Design Data Management and Collaboration

Abstract:  The problem of design data management is often underestimated by project and engineering management. Methodologies that have worked in the past among designers do not necessarily work efficiently today, mostly due to the increased complexity of designs and process design kits, and an increase in the number of people needed to accomplish the design. It is further exacerbated when designers are geographically dispersed and at different technical abilities.  The need for IP management software to manage the design data becomes more apparent as the cycle time from project kickoff to production continues to shorten.

This presentation outlines how Active Semiconductors (Active-Semi) used an IP management tool from ClioSoft to assist in design collaboration across multi sites in different countries, not only for the automated synchronization and version control of design databases, but also for project/specification/design documentation. A case study shows how a 20-person design/ layout team from three worldwide sites used the system during the development of a power management IC and outlines the benefits realized. For more detail, see MIUX207 in Track 7 here -- http://www.cadence.com/cdnlive/na/2016/Pages/wednesday2.aspx

Company: Active-Semi , founded in 2004 in Silicon Valley and headquartered in Dallas, Texas, is a rapidly emerging leader in multi-billion dollar power management and intelligent digital motor drive IC markets. The company's portfolio of analog and mixed-signal SoCs provides scalable core platforms used in charging, powering and embedded digital control systems for industrial, commercial and consumer applications.

Presenter: Wayne Chen, vice president of Active-Semi and a former Fellow at Texas Instruments, has more than 25 years of semiconductor industry experience ranging from design, process development, and operations management.

When & Where:

CDN Live Silicon Valley takes place from April 5-6, 2016, at the Santa Clara Convention Center in Santa Clara, CA. The Active-Semi presentation is at 4:10 on Wednesday, April 6.

About ClioSoft

ClioSoft is the pioneer and leading developer of system-on-chip (SoC) design configuration and enterprise IP management solutions for the semiconductor industry. The SOS Design Collaboration Platform, built exclusively to meet the demanding requirements of SoC designs, empowers multi-site design teams to collaborate efficiently on complex analog, digital, RF and mixed-signal designs. The SOS platform is integrated with major EDA design flows --  Cadence’s Virtuoso® technology, Keysight Technologies’ Advanced Design System (ADS), Mentor Graphic’s® Pyxis Custom IC Design, Synopsys®’ Galaxy Custom Designer® and Laker3™ Custom Design -- making it easy for engineers to use SOS for all types of SoCs.

ClioSoft’s collaborative IP management solution improves design reuse by providing an easy-to-use administration and user cockpit to manage the process of creating and publishing IPs and their derivatives as well as to manage the lineage, IP licensing, security, issue and defect tracking with remarkable ease.

All trademarks or registered trademarks mentioned in this release are the intellectual property of their respective owners.

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Media Contact:

Linda Marchant,
Cayenne Communication,
919-451-0776,
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