Aldec Delivers Unprecedented Scalability and Verification Acceleration with the Latest Release of HES-DVM™
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Aldec Delivers Unprecedented Scalability and Verification Acceleration with the Latest Release of HES-DVM™

HENDERSON, Nev. — (BUSINESS WIRE) — January 15, 2015Aldec, Inc. delivers new functionality to existing hardware resources and enables unprecedented scalability with the latest release of its hardware emulation solution software, HES-DVM™ 2014.12. The unique emulation solution, which can be used with in-house developed boards or off-the-shelf solutions such as HES-7™ SoC and ASIC prototyping boards, offers a higher speed of emulation and ease of use via System Verilog DPI interface that enables scalability and acceleration of verification process for modern SoC projects.

HES-DVM delivers significant improvements to SCE-MI Function Based emulation flows. Users can now enable hardware emulation into their OVM/UVM simulation flows with new features such as support for DPI-C exported tasks, force signal value or plusargs compilation. Aldec HES emulator in-the-loop also allows reuse of OVM/UVM testbench while the design is accelerated in the emulator.

This release brings also significant speed improvements of OVM/UVM simulation acceleration interfaces by optimizing constant arguments of DPI-C functions and introducing automatic clock rescaling called as SCE-MI Clocks Turbo Mode. With these improvements, FPGA implementations of SCE-MI transactors utilize less chip resources and the entire emulation runs significantly faster.

The latest release of HES-DVM also includes numerous new features and enhancements within the Design Verification Manager (DVM) design setup tool. Contact sales@aldec.com to request a demonstration. For additional information and What’s New Presentation visit www.aldec.com/Products/HES-DVM.

About Aldec

Aldec Inc., headquartered in Henderson, Nevada and established in 1984, is an industry leader in Electronic Design Verification and offers a patented technology suite including: RTL Design, RTL Simulators, Hardware-Assisted Verification, SoC and ASIC Prototyping, Design Rule Checking, IP Cores, Requirements Lifecycle Management, DO-254 Functional Verification and Military/Aerospace solutions. www.aldec.com

Aldec is a registered trademark of Aldec, Inc. All other trademarks or registered trademarks are the property of their respective owners.



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Aldec, Inc.
Christina Toole, 702-990-4400
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