LIVE WEBINAR: Boost VHDL Development Time with Background Design Rule Checking (Single Session Only)

Presenter: David Clift, Applications Specialist for both Aldec and Sigasi

Hendrik Eeckhaut, founder and CTO at Sigasi

Thursday, November 30, 2017

3:00 PM – 4:00 PM CET

6:00 AM – 7:00 AM PST

Abstract: 

Design rule checking (DRC) is a battle-proven method to improve the quality of digital designs. In safety-critical design processes, such as DO-254, applying design rule checking tools became a primary method to automate mandatory code reviews at the end of the milestone to achieve sign-off. But why wait for this deadline before launching a DRC solution like ALINT-PRO to verify all design rules? 

The longer it takes to find and fix an issue, the more expensive this gets, and nobody likes going through long lists of (potential) problems. Therefore, it is strongly recommended to run design rule checking regularly. But how do you manage this efficiently while creating your design? 

Sigasi Studio is an IDE that makes HDL design easier and more efficient. Sigasi Studio can automatically run ALINT-PRO checks on your design files when you save your files. The checks run transparently in the background and the results are clearly presented right in the editor. This fast feedback enables you to fix the issues swiftly, and helps you focus on the important design challenges. 

Agenda: 

  • Why do Design Rule Checking?
  • Why wait till the next Milestone? 
  • Sigasi rapid code development methodology 
  • Advanced rules in Aldec ALINT-PRO
  • Sign off design rule checking
  • Demo 
  • Summary 
  • Q & A

Presenter Bios:

David Clift

David Clift is an Application Specialist at FirstEDA Limited. David’s electronics engineering career started at GEC Marconi when he joined the company as an R&D engineer in 1984, working on a range of projects including Silicon-on-Sapphire and radiation tolerant ICs. David moved into the EDA industry in 1994. David is Applications Specialist for both Aldec and Sigasi.

 

 

 

Hendrik Eeckhaut

Hendrik Eeckhaut is founder and CTO at Sigasi. He has a PhD in Computer Science Engineering and did research on artificial intelligence and on FPGA design methodology for scalable video codes. In 2008 he co-founded Sigasi because he believes hardware designers deserve better tools. His mission is to help designers focus on the actual design, and automate away all distractions.