We've just released a new high-performanced compiled-code Verilog-2001 simulator called VeriLogger Extreme. It's been in beta test for about 4 months now as well as extensive internal testing, and we're looking for feedback from a larger group of users now. For anyone who helps us out during this period, we're offering a minimum of $1000 off the regular price (or more if we get significant feedback about performance, usability, etc).
One of the more unique features of VeriLogger Extreme is it includes a very fast automated test bench generator for rapidly testing small models in a design. Testbenches for these types of models can be generated much faster than by hand and are much easier to change.
Another useful feature is that the simulator comes with a full graphical debugger that works with most of the popular simulators, so it's easy to switch back and forth between different simulators, to validate your design against
simulator variations. This is particularly handy if you're a consultant who needs to work with simulation tools from multiple vendors.
For more information about the simulator and debugger,
To download the simulator and try it out,