I am using an evaluation version of Microwind. It uses a .12 um process and VDD = 1.2 V. I had info that min. VDD reached till now was 1.8 V.
I dont know which of these is right or if they co-exist? Can anyone please explain.
Is it not true that under saturation, max VDS = VDD-VT. That makes max possible logic 1 voltage as 1.2-.6~ .6V. The max logic 1 voltage I am getting with this tool is~ .56V. I dunno if it qualifies as logic1 ( I thought its logic 0 till .8 as nFET cant go ON till VGS = VT ~ .7V??) .
I cant put even two pFETs in series. Logic1 goes down even BELOW .4V with large delay (output wave is like a saw-tooth).
If anyone has any info on this 1.2V tech or on this simulation tool, please explain ....
THANKS A LOT IN ADVANCE.