EDAToolsCafe
   >> EDA User News and Reviews
Thread views: 322 View all threadsNext thread*

Juliano Oliveira
(Unregistered)
07/07/16 03:27 AM
Juliano Oliveira Report this article as Inappropriate to us !!!Login to Reply

Excellent initiative about the future system-on-chip/system-in-package manufacturing reduction costs and technology improvement.
Unfortunately this initiative is addressing only FPGAs and GPUs application, it will be very interesting to have such initiative about silicon photonics together with CMOS ASIC system-in-package integration


Entire thread
SubjectPosted byPosted on
*A*STAR’S IME LAUNCHES CHIP-ON-WAFER CONSORTIUM II AND COST  07/07/16 03:27 AM
.*Juliano OliveiraJuliano Oliveira  07/07/16 03:27 AM
Jump to

 

CST Webinar Series



Internet Business Systems © 2016 Internet Business Systems, Inc.
595 Millich Dr., Suite 216, Campbell, CA 95008
+1 (408)-337-6870 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy Policy