EDAToolsCafe
   >> Verilog Discussion Board
Thread views: 12764 View all threadsNext thread*

ihabraad
(Stranger )
02/28/07 09:20 AM
real numbers multiplier Report this article as Inappropriate to us !!!Login to Reply

Verilog question (Tripoli – Lebanon)

Hi;

I nead a help for a verilog simulation program:

I am trying to do a real numbers multiplier in verilog simulation code using ModelSim simulator (without schematic).
The Problem is that Verilog doesn’t accept to define an input as real (register) and when I try to use intermediate real registers before multiplying and put the result also in a real register; verilog around them to integers!!!! L
I am very sad…. :’-( Plz any help?
Ihab – Lebanon (University of Balamand)

iraad@balamand. edu.lb






Entire thread
SubjectPosted byPosted on
*real numbers multiplier ihabraad   02/28/07 09:20 AM
.*Re: real numbers multiplier mrkeyse   03/22/07 05:42 AM
Jump to

 

CST Webinar Series
Verific: SystemVerilog & VHDL Parsers
TrueCircuits: IoTPLL



Internet Business Systems © 2016 Internet Business Systems, Inc.
595 Millich Dr., Suite 216, Campbell, CA 95008
+1 (408)-337-6870 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy Policy