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ihabraad
(Stranger )
02/28/07 09:20 AM
real numbers multiplier Report this article as Inappropriate to us !!!Login to Reply

Verilog question (Tripoli – Lebanon)

Hi;

I nead a help for a verilog simulation program:

I am trying to do a real numbers multiplier in verilog simulation code using ModelSim simulator (without schematic).
The Problem is that Verilog doesn’t accept to define an input as real (register) and when I try to use intermediate real registers before multiplying and put the result also in a real register; verilog around them to integers!!!! L
I am very sad…. :’-( Plz any help?
Ihab – Lebanon (University of Balamand)

iraad@balamand. edu.lb





mrkeyse
(Stranger )
03/22/07 05:42 AM
Re: real numbers multiplier new [re: ihabraad]Report this article as Inappropriate to us !!!Login to Reply

A coworker of mine was doing something similar to this and used $realtobits and $bitstoreal to get around the limitation on passing real numbers through the module interface.

$realtobits - Passes bit patterns across module ports; converts from a real number to the 64-bit representation (vector) of that real number.

$bitstoreal - The reverse of $realtobits; converts from the bit pattern to a real number.

Some examples of their use:

module driver (net_r);
output net_r;
real r;
wire [64:1] net_r = $realtobits(r);
endmodule

module receiver (net_r);
input net_r;
wire [64:1] net_r;
real r;
initial assign r =$bitstoreal(net_r);
endmodule

Hope this helps.





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