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nstollon
(Stranger )
06/12/06 10:19 AM
VHDL to Verilog new Report this article as Inappropriate to us !!!Login to Reply

A friend wasasking me aboutwhat are best ways/best tools to convert VHDL to Verilog code. He has this problems on a regular basis. Suggestions?

neals@fs2.com





5nc
(Stranger )
06/21/06 02:08 AM
Re: VHDL to Verilog new [re: nstollon]Report this article as Inappropriate to us !!!Login to Reply

Neal,

It really depends on the reason for the conversion. Most modern EDA tools will accept both and even combinations of the two in the same design. A quick and dirty route would be to use a synthesis tool such as Synopsys to convert the VHDL to "generic" logic and then use a TCL or Perl script to replace the generic logic with Verilog primitives.

Kind regards,

Stephen Corney



sandor
(Stranger )
06/21/06 06:53 AM
Re: VHDL to Verilog new [re: nstollon]Report this article as Inappropriate to us !!!Login to Reply

There is also a VHDL to Verilog translator utility available for download from: http://www.ocean-logic.com/downloads.htm.

I never used it, but my understanding is that it works quite well, although it does not necessarily support every possible construct you can find in VHDL. It's worth checking out, though.

Sandor



dave_59
(Stranger )
08/04/06 04:21 AM
Re: VHDL to Verilog new [re: nstollon]Report this article as Inappropriate to us !!!Login to Reply

You might have your friend consider converting from VHDL to SystemVerilog. There is a better correspondence between the features of the languages, and synthesis tools are now begining to support SV.

Dave




wkafig
(Stranger )
08/08/06 01:36 PM
Re: VHDL to Verilog new [re: nstollon]Report this article as Inappropriate to us !!!Login to Reply

Aldec claims to have a good VHDL to Verilog conversion tool. You can get an evaluation version of the tool from:
http://www.aldec.com/downloads/
and select "Active-HDL".

This tool also have some decent documentation capabilities and a very good simulator.

Before going this route (or any other), what is the actual NEED to do the translation? Most simulation and synthesis tools will handle both languages.

If the issue is becoming familiar with VHDL, both Technically Speaking and Xilinx offers an excellent instructor led VHDL classes all over the country.

There are some decent on-line trainings and tutorials as well.




mayankmehta_83
(Stranger )
09/27/07 02:53 AM
Re: VHDL to Verilog new [re: wkafig]Report this article as Inappropriate to us !!!Login to Reply

before telling if there is any vhdl-verilog converter available everyone asks what's the need of one...

 i guess answer is this:

if one is comfortable with verilog and has got a vhdl code, to understand how and what it does and more importantly to manipulate that code, one would require a converter...





dannote
(Stranger )
10/03/07 10:23 PM
Re: VHDL to Verilog [re: nstollon]Report this article as Inappropriate to us !!!Login to Reply

SynaptiCAD offers a tool that translates VHDL to Verilog. The translated code will typically need some manual cleanup afterwards. We also offer a "full-service" translation where we use the tool and do cleanup and verification afterwards to ensure equivalence.

Dan Notestein
President, SynaptiCAD
http://www.syncad.com

IDS
(Stranger )
11/07/07 07:40 AM
Re: VHDL to Verilog new [re: nstollon]Report this article as Inappropriate to us !!!Login to Reply

X-TEk provides a capable VHDL to Verilog or Verilog to VHDL translator for

production use. You can take a look at it at www.x-tekcorp.com 





rashu
(Stranger )
02/11/08 09:53 PM
VHDL to Verilog new [re: sandor]Report this article as Inappropriate to us !!!Login to Reply

i am not able to extract the files after downloading the hdl converters under "free software" section of fron http://www.ocean-logic.com/downloads.htm. Please tell me if there is any other way of getting those hdl converters.



einfochipsEIC
(Stranger )
09/19/16 04:01 AM
Re: VHDL to Verilog [re: nstollon]Report this article as Inappropriate to us !!!Login to Reply

FPGA prototyping is efficient approach in HDL migration and FPGA debug.






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