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Click to Modify Description Company
26793
Rosie Tackles New HP Z800
Hewlett-Packard Workstations
26352
"Make or Break Year"
Gary Smith
28589
"Timing Analysis Victory",
Extreme DA
26106
DAC 1991 Video Parody
Cadence
27841
Mark Gogolewski MEMCON
Denali
26156
"Logic NVM for Wireless
Virage Logic
28519
"Comm. IC Trends",
Joe
The Linley Group
37290
John Lenyo, Vice President
Mentor Graphics
37297
Joseph Sawicki, Vice
Mentor Graphics
37291
Jim Kenney, Director
Mentor Graphics
26557
AWR TV: ACE - Automated
AWR
37326
Mike Gianfagna, Vice
Atrenta
28448
"New JasperGold & ActiveDesign",
Jasper Design Automation
27292
Sandra Larrabee,
University
EVE
35128
"3D TSV and Silicon Test",
Mentor Graphics
34244
"New A to Z Board Layout
AWR
45305
Lawrence Romine, Director
Sanjay Gangal interviews Lawrence Romine, Dir of Global Business Development of Altium at 2016 DesignCon. Altium
35173
"AMBA 4 Cache Coherency,
Jasper
33884
"New Technology Down
Common Platform Technical Forum
35136
"New Perl Scripting Front-End",
Verific
32189
"Wicked Rumor, SpyGlass
Atrenta
34226
"ADS 2011 Momentum Update",
Agilent EEsof
37350
Tom Feist, Senior Marketing
Xilinx
32039
"SI and Chip-Package-System
Apache
34449
"Jasper Formal Verification
ARM
35226
"New PCIe UVM Verification
ExpertIO
37305
Rick Stanton, Director
Dassault Systemes Enovia
37312
Robert Wong, Senior Product
Open Text
37304
Andrew Haines, VP Marketing
Arasan
31985
"InRoute, xACT-3D, Auto-Waiver",
Mentor Graphics
32193
"Don't Panic!",
Gary
Gary Smith EDA
35159
"OpenText Remote Connectivity
Open Text
28362
"SoC and Analog/Mixed
Mentor Graphics
32019
"Multi-Core Breakthrough",
Berkeley Design Automation
32052
"New Job Reqs",
Mark
EDA Careers
30328
"ViXS 3290 Video Chip
Virage Logic
28356
"Design Mgmt. for A/M-S
Methodics
35368
"Diagnosis Driven Yield
Mentor Graphics
28461
"New 1Team Genesis",
Atrenta
32103
"New Quartz Physical
Magma
36865
"New Verissimo SystemVerilog
AMIQ
29337
"Exceed onDemand Transforms
Open Text
26394
Luigi Ternullo
Virage Logic
28520
"New Totem and RedHawk
Apache
28367
"New Olympus-SoC & Calibre
Mentor Graphics
30361
"Connected SI Design
AWR
36619
"Virtual Prototype Analysis:
SiSoft
35256
"New Formal Verification
OSKI Technology
31991
"Aceplorer Power and
DOCEA Power
28473
"New 32nm SiWare Memory
Virage Logic
30345
"Award-Winning Verifcation
Synopys
27287
Tobias Bjerregaard
Teklatech
36834
"New JasperGold Apps
Jasper
35171
"TSMC AMS Ref. Flow 2.0
Berkeley Design Automation
35130
"Analog System Simulation
Asygn
32033
"Enovia, Simulia and
Dassault Systemes Enovia
35249
"New TotalHistory Debugging
GiDEL
32161
"New ProjectIC Collaboration
Methodics
26334
Encounter 8.1 Foundation Flow
Cadence
35211
"New 28nm FLows, 3DIC,
Mentor Graphics
28480
"Non-Volatile Memory
Virage Logic
36847
"Update: Catapult C-Synthesis,
Calypto
26111
Running Cadence SoC-Encounter...on
Cadence
26107
Interactive Floorplanning
Cadence
28403
"New 40nm IP Portfolios",
Virage Logic
26149
"Design Challenges at
Virage Logic
35371
"LED Optical Solutions
Synopsys
32005
"Galaxy Implementation
Synopsys
33840
Interview with Pat Pistilli's
EDAC Kaufman Award Dinner 2010
39970
Dr. Johannes Stahl, Director
Interview with Dr. Johannes Stahl, Director of Product Marketing at Synopsys Synopsys
27280
Vlad Marchuk
POLYTEDA at DATE
34171
"New Standards and Interface
Accellera
34217
"New UVM and Modeling
Accellera
32202
"Rapid 3D IC Configuraton",
R3Logic
26109
Partitioning a Design
Cadence
28389
"LinBIST & Analog Test",
ATEEDA at DAC
26051
Movie: EDA - Where Electronics
EDA Consortium
36214
"ECAD and MCAD Solutions",
EMA Design Automation
44494
Fast Innovation: Disrupt
The Fast Innovation keynote features a discussion on the evolution of the connections between people, data, business and innovation as enabled by the Internet of Everything and a connected society. CES
32091
"Titan - Acclerating
Magma at DAC
29359
"New ZEBU Emulator",
EVE
40055
Mick Posner, Director
Interview with Mick Posner, Director of Product Marketing at DAC Synopsys
34245
"Fast Design of High-Q
AWR
27792
TLM-2.0's Loosely Timed
Open SystemC Initiative - Full tutorial
32053
"Enabling a World Cup
Altos at DAC
28482
"40nm Interface IP News",
Virage Logic
36609
"AWR Suite addresses
AWR
27270
Chouki Aktouf
Defacto Tech
35262
"New GoldX Extractor,
Extreme DA
28264
"Data Mgmt. for Hardware
Cliosoft
32010
"DSM Revolution at 28nm",
Mentor Graphics at DAC
34240
"New 3D-IC Design Offering",
Cadence
27289
Michael Pronath
MunEDA at DATE
38022
Scott Hamilton, Vertical
Dell Inc.
26114
Using Global Timing Debug
Cadence
27281
Ghislain and Sylvian Kaiser
DOCEA Power
34227
"New MIPI M-PHY IP",
Mixel
37849
Mark Gilbert, President
EDA Careers
33808
NanoCMOS Statistical
Gold Standard Simulations
32028
"New Tekton Timing Analysis",
Magma at DAC
35132
"Suprising Verification
Mentor Graphics Verification Horizons
30165
High-speed Packet Router
Open SystemC Initiative (OSCI)
30596
"SystemC, ESL and the
Gary Smith EDA
32148
"New Calibre InRoute
Mentor Graphics
27225
John Aynsley, "TLM-2.0
Open SystemC Initiative (OSCI) Full tutorial
34237
"New Unified Digital
Cadence
26050
Preview: EDA - Where
EDA Consortium
32144
"New JasperGold and ActiveDesign",
Jasper at DAC
27756
Soha Hassoun, Design
Design Automation Conference
26155
"DDR All-Digital PHY+DLL",
Virage Logic
26115
Using the Pin Editor
Cadence
30382
"Electromagnetic Solver
Sonnet
26378
Brad Brimm
Sigrity at DesignCon
30657
"Development Environment
AMIQ
32174
"New ReqTracer Requirements
Mentor Graphics
34215
"EMIStream Update",
Eriko
NEC
42736
NVIDIA press conference
Tegra K1 in Two Flavors: 32-bit and 64-bit versions. NVIDIA co-founder and CEO Jen-Hsun Huang at the company's press conference at CES 2014 in Las Vegas. Nvidia
28481
"The Resurgence of HW/SW",
Mentor Graphics
39957
Aveek Sarkar, V.P.
Interview with Aveek Sarkar, VP Product Engineering & Support at Apache / Ansys Apache
26386
Mike Gianfagna
Atrenta at DesignCon
32030
"Co-Design for Chip-Package-Board",
Physware
32203
"Power Integrity Across
Mentor Graphics
34413
"DAC has Changed!",
Patrick
Design Automation Conference
34447
"The Time is Right: New
EDA Careers
32196
"Catapult-C Synthesis
Mentor Graphics at DAC
30362
"Correlated IBIS-AMI
SiSoft
31990
"Verdi, Laker and Certitude
SpringSoft
32181
"Vista Multi-Core Optimization
Mentor Graphics at DAC
27262
Philippe Faes
Sigasi
37298
Gary Tyreman, CEO
UNIVA
36624
"Total IP Solutions Update:
Arasan
32044
"New Satin and Design
Satin Technologies
32194
"InFact More Intelligent
Mentor Graphics
35244
"LOVE! and SOC Realization
Atrenta
36646
"A World of Semiconductor
Common Platform Technology
31994
"New Generation ASIC
GiDEL
29879
TLM-2.0 Extensions for
Open SystemC Initiative (OSCI)
28446
"VIP Lane for Quality
Satin IP
27267
Michel Tabusse
Satin IP at DATE
26363
Exceed Connectivity Solution,
Open Text
27996
Ali Iranmanesh, CEO, SVTI
ASQED Conference Preview
31993
"High Efficiency Verification",
Mentor Graphics
32022
"Verification IP and
ExpertIO web-site
28286
"I/O Designer for FPGA/PCB
Mentor Graphics
32029
"New Visual Design Diff
Cliosoft
32188
"WaveIntegrity and New
Coupling Wave Solutions at DAC
26382
Aveek Sarkar
Apache at DesignCon
44481
Mercedes’s Dieter Zetsche
Dieter Zetsche, chairman of Daimler AG and head of Mercedes-Benz Cars speaks on the press day of the Consumer Electronics Show in Las Vegas on January 5. Zetsche unveils Mercedes’s self-driving car. CES
28478
"FPGA Synthesis",
Daniel
Mentor Graphics
32160
"New Global Partner Ecosystem",
GLOBALFOUNDRIES
26387
Jonathan Oakley
CST - Computer Simulation Technology
30754
Why DAC 2010?
Design Automation Conference
32011
"New PowerDRC Verification",
POLYTEDA at DAC
34235
"DesignCon and ESC Silicon
UBM Electronics
28337
"ESL Design: Catapult
Mentor Graphics
35195
"Advanced Functional
Real Intent, Inc.
26116
ViVA-XL - Analog Fast
Cadence
26152
"Standard Cell Logic
Virage Logic
32042
"Precision Rad-Tolerant
Mentor Graphics
40027
John Heinlein, V.P.
Interview with John Heinlein, V.P. of Marketing at ARM ARM
35372
"Fast Analog Device Testing",
Aemulus
35176
"Place-n-Route: New Parametric
ATopTech
28365
"ASIC & SoC Prototyping",
GiDEL
28432
"New Modeling Toolkits",
Lynguent Incorporated
27251
Jitu Choudhury
Axilica at DATE
30606
"New 2010 DAC Events
Design Automation Conference
34169
"New PDN Analysis",
Brad
Cadence
34208
"Complexity and IP Design
Atrenta
28549
"OVM; Verifcation Solutions
Mentor Graphics
35197
"My 40nm Design Closure
Cisco Systems
28471
"OVM Acceleration with
Mentor Graphics
26559
AWR TV: Tutorial - Effective
AWR
37303
Andrew Betts, Director
Asygn
38148
Antonio Ciccomancinni,
CST
33885
Interviews with MP Associates
EDAC Kaufman Award Dinner 2010
35190
"New Sorcery CodeBench
Mentor Graphics
37337
Rajeev Ranjan, Chief
Jasper Design Automation
27253
Gary Smith
DATE 2009 Review
38138
Lawrence Romine, Business
Altium
27260
Dan Hamon
Tanner EDA
39961
Sam Appleton, CEO
Interview with Sam Appleton, CEO of Ausdia. Ausdia
27258
Rudy Lauwereins
IMEC
35377
"HDI Fabrication, ITAR
Surface Art Engineering
26393
Russ Adams
Prototron Circuits at DesignCon
26381
Rob Irwin
Altium
29445
SiPro Webcast
Virage Logic
40062
Sudhakar Palisetti, COO
Interview with Sudhakar Palisetti, Chief Operating Officer of SiCon Design Technologies SiCon Design Technologies
26380
Colin Warwick
Agilent EESof
26182
Shankar Hemmady, Principal
DesignCon 2009
28400
"infact Intelligent Testbench",
Mentor Graphics
34214
"MultiSim Update",
Natasha
National Instruments
37324
Ravi Subramanian, President
Berkeley Design Automation
40000
Andrew Haines, V.P.
Interview with Andrew Haines, V.P. at Arasan Chip Systems Arasan Chip Systems
26150
"Highly Configurable
Virage Logic
35271
"Plug-n-Play PCIe3.0
SiSoft at PCI-SIG
27980
Jim McCanny at Japan
Altos Design Automation
26379
Todd Westerhoff
SiSoft
31987
"Design Management Framework",
Sapient Systems
39972
Mark Gilbert, President
Interview with Mark Gilbert, President of EDA Careers EDA Careers
39959
Eric Thune, V.P.
Interview with Eric Thune, V.P. of Sales at ATopTech ATopTech
26176
Sergio Camerlo, Dir.
DesignCon 2009
28425
"New Catapult Synthesis
Mentor Graphics
34437
"New Debugging Software
EVE
34338
"New Customers and Timing
Extreme DA
30344
"Practical Design Integrity
Apache Design Solutions
36599
"New HyperLynx Release
Mentor Graphics HyperLynx Page
27385
Electronics “Least
Cadence Industry Insights
30367
"New Tanner EDA",
John Zuk
Tanner EDA
28408
"Formal Verification
Mentor Graphics
35192
"New FastSpice, MEMs
Tanner EDA
34260
"New Verification IP
ChipEstimate.com
37064
"End-to-End Formal and
Oski Technology
30376
"25Gbps 4-Chanel Interface
Tyco Electronics
37364
Shawn McCloud, Vice President
Calypto
31984
"SOC Verification", Kensey
Breker Verification
30950
ISQED Fellow Award Winner:
Polytechnic of Bari, Italy
38141
Paul Sakamoto, VP of
DCG Systems
39955
K.T. Moore, Group Director
Interview with K.T. Moore, Group Director Silicon Signoff and Verification at Cadence Cadence
34236
"Unannounced FPGA Debug
InPA Systems
27294
Vinod Kathail
Synfora
26383
Ron Choi
EVE Team at DesignCon
35263
Aceplorer ESL Power Exploration
DOCEA Power
39966
Roddy Urquhart, V.P.
Interview with Roddy Urquhart, V.P. of Sales and Marketing at Cortus Cortus
27559
Model Interoperability
Open SystemC Initiative (OSCI) Full tutorial
27266
Joe Sawicki
Mentor Graphics
29747
OSCI Configuration, Control,
Open SystemC Initiative (OSCI)
31989
"Fast Statistical Timing
Extreme DA
35252
"New ProtoLink Probe
Springsoft
29587
Synopsys' DesignWare®
Synopsys, Inc.
35154
"Power Management from
Apache
27278
Wally Rhines
EDA in 2009
36833
"Product Update and New
Real Intent, Inc.
37645
Keynote By Dr. Ajoy Bose
Atrenta
26178
Sury Maturi, Director,
DesignCon 2009
26175
Kevin Donnely, Vice President
DesignCon 2009
34409
"GoldMine: Automatic
University of Illinois at Urbana-Champaign
40032
John Zuk, V.P.
Interview with John Zuk, V.P. Strategic Marketing at Tanner EDA Tanner EDA
26112
New Spectre Turbo
Cadence
27271
Pietro Vergine
Leading Edge
32187
"EDA360, ESL and Palladium",
Cadence at DAC
33185
"New 32nm Low Power Hi-K
Samsung Foundry
30385
"Sign-off Metrics for
Atrenta
30648
"Implementing the Right
WhizChip
32020
"ARC Processor Revolution",
Virage Logic
28399
"New SDL Router, DevGen
Tanner EDA
28865
Easy VHDL Code Inspection
Sigasi
35379
"New Monster PAC LGA",
ConnectTec Japan
36610
"Allegro Update: PDN
Cadence
37309
"New Meridian CDC and
Real Intent, Inc.
34210
"Palladium System Verification",
Cadence
39275
Raul Lucas, General Manager,
Interview with Raul Lucas, General Manager, idneo and Brian Morrison, Engineering Manager at SMTC SMTC
35255
"New SOS Data Management
Cliosoft
30384
"New Sphinx Sign-off
E-System Design
28262
"New PicoExtreme Synthesis
Synfora
35370
"Innovations in 3D-IC",
IMEC
26388
Ali Iranmanesh
ISQED
34430
"Keys to a Successful
ExpertIO
28407
"New XtractIM Package
SIGRITY
26108
Introducing Virtuoso
Cadence
30658
AWR TV: Using TX-Line
AWR
32006
"Accelerating Verification
EVE
39252
John Cornish, Executive
Interview with John Cornish, Executive VP & General manager of System Design Division at DesignWest 2013 ARM
38456
Shawn McCloud, V.P. of
Interview with Shawn McCloud, V.P. of Marketing at Calypto Calypto
27290
Firas Mohamed
Infiniscale
27555
Phil Kaufman Award Call
EDAC Nomination Page
35378
"Breakthrough Pressureless
Henkel Electronics
28477
"Software and Fast Prototyping",
Synopsys
37649
Keynote speech by Jim
Atrenta
30342
"Power Architecture Update",
Power.Org
26151
"Avoiding Test Escapes
Virage Logic
38149
Brad Griffin, Product
Cadence
39968
Oz Levia, V.P.
Interview with Oz Levia, V.P. of Marketing at Jasper Design Automation Jasper
28460
"New Stratix IV RocketDrive",
GateRocket
26169
Keynote Preview: Lisa
ESC Silicon Valley
32048
"Platform for Creating
Verific
34242
"IBIS-AMI Modeling Extensions",
SiSoft
39958
Charlie Janac, CEO
Interview with Charlie Janac, CEO at Arteris Arteris
32023
"Firmware - Hardware
Gary Stringham and Associates
26385
Larry Williams
Ansoft at DesignCon
26391
Ashraf Takla
Mixel at DesignCon
35122
Interview with Tom Pennino:
EDAC Kaufman Award Dinner 2010
28428
"Cost of Product Ownership",
Tanner EDA
39964
Sanjiv Kaul, CEO
Interview with Sanjiv Kaul, CEO at Calypto Calypto
36604
"Repeater modeling with
Agilent EESof
27284
Mike Meredith
OSCI at DATE
45067
Richard Yu, Sr Dept Mgr
Sanjay Gangal interviews Richard Yu, Sr Dept Mgr of Corporate Communications of UMC at 2015 DAC Conference. UMC
37660
VHDL-AMS inverting op-amp
Triad Semiconductor
37646
Keynote speech by Jim
Atrenta
38155
Brian Vicich, Engineering
Samtec, Inc.
30625
"UVM and SystemC Developments",
Doulos
39960
Mike Gianfagna, V.P.
Interview with Mike Gianfagna, Vice President at Atrenta Atrenta
44496
Sensor Highlights at CES 2015
The market for sensor technology is expected to reach $6.5 billion in 2018. It takes center stage at CES 2015. CES
32104
"Fast Library Characterization",
Z Circuit
34246
"3D HDMI Tx and Rx Demo",
Synopsys
28397
"DAC and the Job Market",
EDA Careers
28398
"New Liberate MX and
Altos Design Automation
34233
"Modeling, Business and
Sigrity
28354
"Design Collaboration
Tuscany at DAC
37363
Horacio Mendez, Executive
SOI Industry Consortium
28368
"New Galaxy 2009 Multi-core
Synopsys, Inc.
40030
Chouki Aktouf, CEO
Interview with Chouki Aktouf, CEO of DeFacto Technologies Defacto Tech
35152
"New OlympusSoC Floorplanning
Mentor Graphics
26154
"Addressing DDR System
Virage Logic
28427
"Merger with Spirit Consortium",
Accellera at DAC
34212
"UVM and Silicon Realization",
Cadence
38153
Humair Mandavia, Sr.
Zuken
37306
Lauro Rizzatti, Vice
EVE
34241
"New Chip-Package-System
Apache Design Systems
34401
"UVM 1.0: A Complete
Accellera Verification IP
26168
Keynote Preview: Steve
ESC Silicon Valley
27264
Frederick Rybarczyk
Stickybit
29344
"New SOC System Manager
ATM Consulting and ChipStart
26333
Opening of Cadence Building
Cadence
38147
Bob Buxton
Anritsu
33151
"New SGMII SerDes IP",
Mixel
34446
"Advanced Verification
CVC Pvt. Ltd.
26384
Fawzi Behmann
Power.Org Community at DesignCon
26390
Rick Tomihiro
IPextreme
40056
Dr. Raul Camposano, CEO
Interview with Dr. Raul Camposano, CEO of Nimbic Nimbic
35242
"New UVM 1.1 Standard
Accellera
39965
Karim Khalfan
Interview with Karim Khalfan, Technical Marketing Manager at Cliosoft Cliosoft
40060
Toshio Nakama, CEO
Interview with Toshio Nakama, CEO of S2C S2C
32105
"New H264 IP and Acquisition
CAST
36607
"New EMIStream Release
NEC
30363
"Open Verification Methodology
OVM
40066
Gunnar Scholl, CEO
Interview with Gunnar Scholl, CEO of PRO Design Electronic PRO DESIGN Electronic GmbH
26773
Synopsys DesignWare SuperSpeed
Synopsys, Inc.
37644
Keynote By Dr. Ajoy Bose
Atrenta
34247
"New DDR PHY Compiler
Synopsys
30953
"Beyond Endless Verification",
Denali
32003
"Quick Turnaround PCB
MRS services
28449
"HDL Front-end Components",
Verific Design Automation
37401
Karim Khalfan, Technical
Cliosoft
27295
David Murray
Duolog Technologies
36618
"New Algorithmic Multi-port
Memoir Systems
26157
"NVM for Power Management",
Virage Logic
27263
Simon Payne
XJTAG
28409
"New F3D and R3D for
Silicon Frontline
38023
Todd Davidson
Hewlett-Packard
38021
Tom Salomone, Worldwide
Hewlett-Packard Workstations
38143
Edward Couch, Director
Hughes Circuits Inc
30371
"Hyperlynx and Zeland
Mentor
30373
"New Bandwidth Engine",
Mosys
34168
"Automatic Layout Generation
Tanner EDA
34368
"Free Mar. 16 Design
International Electronic Design Education Conference
27256
Miguel Koch
EVE at DATE
30646
"Interview Dynamics",
EDA Careers
40026
Graham Bell, Senior Director
Interview with Graham Bell, Senior Director of Marketing at Real Intent Real Intent, Inc.
30375
"Pantheon Artwork & Manuf.
Intercept Technologies
44643
Brian Nelson, Manager PCB
Sanjay Gangal interviews Brian Nelson, Manager PCB from Sanmina at 2015 DesignCon. Sanmina
30350
"New IBIS-AMI Modeling
SiSoft
36622
"CST STUDIO SUITE 2012:
CST - Computer Simulation Technology
26046
Low Power Implementation
Cadence
30349
"Timing Constraint Verification",
Blue Pearl Software
39254
'New Hires, Events, DAC
Interview with Graham Bell, Senior Director of Marketing at Real Intent Real Intent, Inc.
27686
Alberto Sangiovanni-Vincentelli
Cadence
39251
Ryan Rangel, President
Interview with Ryan Rangel, President of ClearConnex ClearConnex
30374
"New HPC, PCBStudio,
CST
35375
"New HDI Stackup Planner",
Sierra Circuits
36871
"Verification Academy
Verification Academy
37360
Roddy Urquhart, VP Sales
Cortus
43871
Michael Munsey, Director
Interview with Michael Munsey, Director Semiconductor Strategy at Dassault Systemes at the 2014 DAC Dassault Systemes America
29057
Attend the First-Ever
MATLAB
39279
Stefan Skarin, CEO
Interview with Stefan Skarin, CEO of IAR Systems IAR Systems
30387
"New Virtuoso APS",
Nebabie
Cadence
35253
"New Soft IP Tagging",
Accellera
38156
Lee Ritchey, President
Speeding Edge
29343
"Demo of SiPRO PCIe PHY"
VirageLogic
32046
"Automation and High-Frequency
SIGRITY
38146
Ashraf Takla, CEO
Mixel
39531
Nanomaterials: The Science
Stefan Bon is an associate professor in Chemistry at Warwick, famously making the headlines in 2012 for halving the fat content of chocolate by replacing it with fruit juice. He studied Chemical Engineering at the Technical University of Eindhoven and has a background in developing (living) radical polymerizations. Since 2005 Bon has become an international player in the area of polymer colloids, and continues to innovate in the area. He is the founder of the BonLab, where the study of chemistry and physics of the assembly of molecular and/or colloidal entities into complex structures is conducted. This technology is applicable in everything from sensors and devices, coatings and adhesives, to food, personal care, agricultural and biological systems.

http://www.tedxwarwick.com

In the spirit of ideas worth spreading, TEDx is a program of local, self-organized events that bring people together to share a TED-like experience. At a TEDx event, TEDTalks video and live speakers combine to spark deep discussion and connection in a small group. These local, self-organized events are branded TEDx, where x = independently organized TED event. The TED Conference provides general guidance for the TEDx program, but individual TEDx events are self-organized.* (*Subject to certain rules and regulations)
TED Talks
38452
Tom Anderson, V.P. Marketing
Interview with Tom Anderson, V.P. of Marketing at DVCon. Breker Verification
30340
"New High-speed Co-Development
GiDEL
26105
Cadence Expands VIP Portfolio
Cadence
38151
"New Ascent and Meridian
Real Intent, Inc.
28450
"Analog IP Migration",
Sagantec
30151
Silicon-proven DesignWare®
Synopsys, Inc.
28355
"Peace, Love and Interoperability",
Synopsys
30391
"New MIPI/MDDI Unified
Mixel
39963
Tom Anderson
Interview with Tom Anderson at Breker Verification Systems Breker Verification
26560
AWR TV: Microwave Office
AWR
36603
"New CR-8000: Multi-board
Zuken
38139
Greg Caswell
DfR Solutions
39276
Gregory Proehl
Interview with Gregory Proehl, Senior Product Marketing Engineer at STMicroelectronics STMicroelectronics
36531
"Challenges for Digital
Magma
40031
Andreas Ripp, V.P.
Interview with Andreas Ripp, V.P. Sales and Marketing at MunEDA MunEDA
41981
Stefan Skarin, CEO
Interview with Stefan Skarin, CEO of IAR Systems at the 2013 ARM TechCon Conference IAR Systems
26181
Harry Foster, Chief Verification
DesignCon 2009
32449
"What is Zazz", Khalil
Zocalo Tech
38463
Harry Foster, Chief Verification
Harry Foster, Chief Verification Scientist at Mentor discusses results of a survey of Design Verification users. Mentor Graphics
34337
"Making Hardware/Firmware
Gary Stringham & Associates
36620
"New BA22 32-bit Royalty-Free
CAST
26558
AWR TV: AXIEM 3D Planar
AWR
39971
Rob Dekker, CTO & Founder
Interview with Rob Dekker, CTO & Founder of Verific Design Automation Verific
38144
Bruce Archambeault, Distinguished
IBM
26183
Mobashar Yazdani, ASIC
DesignCon 2009
26788
New Lynx Design System
Synopsys
35373
"New Excalibur RealTime
Magma
30346
"DDR3 Demo at 1600bps",
Synopsys
30343
"New Chip Planning Portal",
ChipEstimate.com
40059
David Gullickson, General
Interview with David Gullickson, General Manager of Zuken Zuken
38140
Eric Bogatin
Bogatin Enterprises
28133
Synopsys & TI Demo SuperSpeed
Synopsys, Inc.
38491
"New Ascent Lint + Catapult-C
Interview with Graham Bell, Senior Director of Marketing at Real Intent. Real Intent, Inc.
33166
"40nm TSMC Multi-channel
Analog Bits
29437
"Demo of SiPRO PCIe PHY"
VirageLogic
32054
"New Standards and New
Accellera
39274
Steve Darrough, VP of
Interview with Steve Darrough, VP of Marketing at Zilog Zilog
26392
Bala Vishwanath
Physware
28402
"New ACEplorer for ESL
DOCEA Power at DAC
30647
"New SOC FPGA Debug",
GateRocket
31650
TLM-driven Design and
OSCI SystemC Day Videos
34354
"Trek Functional Scenario
Breker Verification
35164
"TLM Synthesis Links
Mentor Graphics
26153
"DDR High Speed Interfaces
Virage Logic
34170
"Lightning SI and EMC
Zuken
34249
"Designing Smarter",
Real Intent, Inc.
39962
Mick Tegethoff, Director
Interview with Mick Tegethoff, Director of Technical Marketing at Berkeley Design Automation Berkeley Design Automation
35243
"Chip Timer Optimizes
Library Technologies
38152
Bob Smith, Sr. VP Marketing
Uniquify
30389
"New Thermal & PI Co-Simulation",
Sigrity
32034
"Zazz Cost-Effective
Zocalo Technology at DAC
36606
"Highly Parallel EMI
Nimbic Website
34376
"ESL, IP, ARM, Etc. and
GarySmithEDA
39270
Earle Foster, Senior
Interview with Earle Foster, Senior Vice President, Sales & Marketing at Sealevel Systems Sealevel Systems
30904
Low Power Verification
Jasper Design Automation
35175
"New Cloud-based FPGA
Plunify
33336
EDAC Congratulates Pat
EDA Consortium
35188
"Outsourcing N-1 Designs",
SmartPlay
41405
Yervant Zorian, Chief
Interview with Yervant Zorian, Chief Architect at Synopsys Synopsys
35376
"New Instrumentation
National Instruments
30539
Design Variant Management
EMA Design Automation
35251
"Socrates Suite of IP
Duolog Technologies
39253
Reid Wender
DesignWest 2013 Interview with Reid Wender at Triad Semiconductor Triad Semiconductor
35162
"IP Reuse and the Global
ICManage Website
39280
Peter Carbone, VP Marketing
Interview with Peter Carbone, VP Marketing at Renesas Electronics Renesas Electronics
38154
Raul Camposano, CEO
Nimbic
35273
"Channel Modeling with
Agilent-EEsoft at PCI-SIG
30616
"JasperGold and ActiveDesign",
Jasper Design Automation
34431
"New UVM Support in Certe
Mentor Graphics
36850
"New: Quickstart with
Verification Academy
38142
Dale Hanzelka, Director
Intercept Technologies
39969
Dr. Raik Brinkmann, President
Interview with Dr. Raik Brinkmann, President & CEO of OneSpin Solutions OneSpin Solutions
38186
Sherry Hess, V.P.
AWR
32004
"ESL Design is Mainstream",
Synopsys
32147
"New High-Capacity High-Speed
GateRocket at DAC
34231
"Studio Suite Cadence
CST
38044
"X-Verification: The
Real Intent, Inc.
31986
"Lynx Implementation
Synopsys
30390
"Expert Board Manufacturing
Prototron
39278
Dinyar Dastoor, VP Product
Interview with Dinyar Dastoor, VP Product Management at Wind River Wind River
37588
Simulating an NXP Doherty
AWR
37627
Reid Wender, VP Marketing
Triad Semiconductor
38461
David Murray, CTO
Interview with David Murray, CTO at Duolog Technologies. Duolog Technologies
38167
Michael Hicks, Director
Remcom
26113
Using --Apply All-- in
Cadence
30360
"3D Vision & Fast BER
Agilent EESof
39273
Michael Cioffi
Interview with Michael Cioffi, SE/FAE Manager at McAfee McAfee
36860
"Rapid Prototyping Platform
Cadence
38145
Luc Beauviller
Isola Group
35146
"Vertical Solutions",
EVE
40115
Improv from DAC 2013
Standup comedians from DAC 2013 at Austin EDACafe.Com
40420
Rodney Brooks: Why we
Scaremongers play on the idea that robots will simply replace people on the job. In fact, they can become our essential collaborators, freeing us up to spend time on less mundane and mechanical challenges. Rodney Brooks points out how valuable this could be as the number of working-age adults drops and the number of retirees swells. He introduces us to Baxter, the robot with eyes that move and arms that react to touch, which could work alongside an aging population -- and learn to help them at home, too.

TEDTalks is a daily video podcast of the best talks and performances from the TED Conference, where the world's leading thinkers and doers give the talk of their lives in 18 minutes (or less). Look for talks on Technology, Entertainment and Design -- plus science, business, global issues, the arts and much more.
Find closed captions and translated subtitles in many languages at http://www.ted.com/translate

Follow TED news on Twitter: http://www.twitter.com/tednews
Like TED on Facebook: https://www.facebook.com/TED

Subscribe to our channel: http://www.youtube.com/user/TEDtalksDirector
TED Talks
25432
"DDR High-Speed Interface
Virage Logic
26332
Cadence Booth
Cadence
40028
Rod Simon, Account Executive
Interview with Rod Simon of Open text Open Text
35369
"New ITAR Certification
StreamLine Circuits
39267
Jeff Bader, Vice President
DesignWest 2013 interview with Jeff Bader, Vice President of Embedded Solutions Marketing at Micron Technology Micron Technology
28531
"Vista Architect Platform
Mentor Graphics
32050
"New Analog Custom Design
Tanner EDA at DAC
34209
"10x and 20x Analysis
Physware
35150
"28nm Design Creation",
Cadence
39271
Alan Grau, President
Interview with Alan Grau, President of Icon Labs Icon Labs
29061
"FaradFlex Substrate",
Oak-Mitsui
26158
"Logic NVM for Digital
Virage Logic
42017
Mark Olen
Interview with Mark Olen from the Design Verification Technology Division at Mentor Graphics Mentor Graphics
26170
Energy Harvesting Panel
ESC Silicon Valley
40058
Firas Mohamed, President & CEO
Interview with Firas Mohamed, President & CEO of Infiniscale Infiniscale
35129
"ARC Processor Update",
Synopsys
37347
Marcelo Lubaszewski
Ceitec S.A
33198
"Emerging Opportunities
GSA Global Expo
30386
"EMIStream and PIStream",
NEC EMIStream
25439
EMI Design Rule Check
NEC EMIStream
29068
"New Services",
Russ
Prototron Circuits
44244
Dipesh Patel, Executive
Sanjay Gangal interviews Dipesh Patel, Executive VP and General Manager at ARM at 2014 ARM TechCon. ARM
26177
Mark Gogolewski, CTO,
DesignCon 2009
36920
"PCB Design Part 1 –
AWR
36623
"New OrCAD SI Analysis
EMA Design Automation
38460
John Aynsley, CTO
Interview with John Aynsley, CTO at Doulos Doulos
39272
Matthias Huber, VP of
Interview with Matthias Huber, VP of Marketing at Adlink Technology Adlink Technology
43935
Mike Gianfagna, VP Marketing
Interview with Mike Gianfagna, VP Marketing at eSilicon at 2014 Design Automation Conference. eSilicon
39269
Joe Folkens, Product
Interview with Joe Folkens, Product Marketing Manager at Texas Instruments Texas Instruments
44239
Laurence Barberis, Product
Sanjay Gangal interviews Laurence Barberis, Product Marketing Manager at Atmel at 2014 ARM TechCon. Atmel
30660
"Breakthrough ZEBU Server",
EVE
34230
"IP Update and Platform
PLDA
36605
"Growing DesignCon Program
UBM Electronics
39268
Bob Potock, VP Marketing
Designwest 2013 interview with Bob Potock, VP Marketing at Kozio Kozio
45294
Robert Kyncl, YouTube
Robert Kyncl is the Chief Business Officer at YouTube where he oversees all business functions including content, sales, marketing, platforms, access, and strategy. Previously, Robert was Vice President of Content at Netflix, where he spearheaded the company’s content acquisition for streaming TV shows and movies over the Internet.

Robert has been listed in Variety’s Dealmakers Impact Report as one of their “disruptors”, Vanity Fair’s New Establishment List, Billboard’s Power 100 List, Billboard’s International Power Players List, Billboard’s Digital Power Players List, and AdWeek’s 50 List of Vital Leaders in Tech, Media and Marketing.
Google
34445
"New ActiveProp",
Rajeev
Jasper Design Automation
34434
"New Questa CodeLink
Mentor Graphics
30381
"New AutoDesk & Aldec
EMA
37353
Michelle Munson, President
Aspera
26104
Enterprise Verification
Cadence
38598
John Cornish, ARM on
John Cornish, EVP and General Manager of the System Division at ARM, and Alexander Duesener, Vice President of WFO Cadence EMEA, highlight Cadence mixed-signal solutions and its capabilities to help design complex SoCs containing ARM Cortex M0+ processors. ARM
39277
Dan Demers, Director
Interview with Dan Demers, Director of Marketing at Congatec Congatec
41982
Zachi Friedman
Interview with Zachi Friedman, Director of Product Marketing, Mobile Storage at Arasan Chip Systems Arasan
33186
"New General Purpose
True Circuits
33147
"New V4 ColdFire Core",
IPextreme
34408
"OVM-to-UVM Migration
AMIQ
30372
"Value Chain Producer",
eSilicon
35194
"New All-in-One Tekton
Magma
31988
"SystemC Update and A/M-S",
Open System C Initiative
35269
"New Conversation Central
Synopsys
41371
Combined 3D electromagnetic
Magnetic Resonance Imaging (MRI) systems rely on a complex interaction of different physical domains: electromagnetic fields trigger a response of nuclear spins inside the human body, while thermal heating of the body needs to be controlled. The quality of the resulting MR image depends both on the homogeneity of the underlying RF fields and on the sequence chosen to create the image. In this webinar we will present a co-simulation of CST MICROWAVE STUDIO (CST MWS) for the coil design and the Jülich Extensible MRI Simulator (JEMRIS -- www.jemris.org) to show these joint effects. CST MWS is used to design and simulate the MRI RF coil. This is a challenging task, especially for modern high field systems. Typically the "coils" are based on multi-channel systems which require circuit based matching and tuning to obtain the desired homogeneous field overlay. The new CST MRI-toolbox helps to directly evaluate the essential quantities such as the B1+ and B1- fields, their statistical properties, but also safety relevant quantities such as general averaged SAR results, "worst case SAR" of multi-channel systems or "total SAR per material". Transient thermal heating based on the bioheat equation can also be monitored.JEMRIS is used to simulate the image generation based on the Bloch equations, with EM fields simulated in MWS and the selected MR sequence as inputs. The images obtained through simulation show potential artefacts due to non-ideal field distributions or the sequence properties. Additional outputs can be generated to obtain important quantities such as g-factors and the image signal to noise ratio. CST
37341
Brad Quinton, Chief Architect
Tektronix
39313
Modeling Next-Generation
An overview of Intel® CoFluent™ Studio, an integrated Electronic-System-Level modeling and simulation environment. Intel® CoFluent™ Studio allows for behavioral and performance estimation without the need for embedded software application code, firmware, or a precise description of the platform with models of each component/IP core. Find out more at cofluent.intel.com Intel
41402
Robert Aitken, R&D Fellow
Interview with Robert Aitken, R&D Fellow at ARM ARM
36611
"Panel Summary: Is Analog
Cadence
37400
Gert Goossens, CEO
Target Compiler Technologies
41511
SimVision Assertion Debug
Quick introduction to some of the Assertion debug features of SimVision including basic probe commands to collect needed debug information, hyperlinked assertion debug messages within the SimVision Console, the Assertion Browser window (for analyzing all assertions within the environment), sending assertions to the waveform to view their state, contributing signals, as well as transaction related information. Video is based on the 13.1 version of SimVision however, most of the features outlined are available in previous releases. Cadence
36852
"SOC Integration, IP
Methodics
37590
RF Link Prediction -
AWR
40895
Using Tcl Scripts as
This video covers how to use Tcl scripts in Vivado projects as source files instead of XDC constraint files. These Tcl scripts support more advanced capabilities such as looping, procs, and custom code which cannot be supported with normal XDC source file management in projects. This feature is supported beginning in Vivado 2013.2 For More Vivado Tutorials please visit: www.xilinx.com/training/vivado Xilinx
38454
Joe Hupcey III, Director
DVCon Interview with Joe Hupcey III, Director of Product Management at Cadence. Cadence
45292
Mary T. Barra, GM - Keynote
Mary Barra is Chairman and Chief Executive Officer of General Motors, a position she has held since January 15, 2014. Under her leadership, GM is driving to become the global industry leader in automotive design and technology, product quality and safety, customer care and business results. Barra began her career with GM in 1980 as a General Motors Institute (Kettering University) co-op student at the Pontiac Motor Division. After graduating in 1990 with a Masters in Business Administration from the Stanford Graduate School of Business, she held several executive level positions within GM before becoming CEO in 2014. CES
35151
"Conformal ECO Designer
Cadence
44492
Brian Krzanich, Intel
Intel Corporation CEO Brian Krzanich deliverS a keynote address at the upcoming 2015 International CES. During the keynote, Krzanich addresses what’s next in computing innovation, the forces driving the next wave of consumer technology, and the company’s plans for bringing amazing experiences that redefine computing to life. Intel
33164
"Extraction for RF &
Helic website
45308
Jeff Waters, President and CEO
Sanjay Gangal interviews Jeff Waters, President and CEO of Isola Group at DesignCon 2016 Isola Group
37339
John Heinlein, Vice President
ARM
30588
"OSCI Announcements",
Open SystemC Initiative
30605
"Carbon Model Studio",
Carbon Design Systems
36873
"Substantial Portfolio
Sibridge Technologies
26110
Quickly Create and Manage
Cadence
42018
Frank Schirrmeister
Interview with Frank Schirrmeister, Product Marketing Group Director for System Development at Cadence Cadence
44498
Panel Discussion - How
The mobile keynote panel features top executives including Jan Brockmann, CTO and SVP, Electrolux, Phil Abram, Chief Infotainment Officer, General Motors, Jeroen Tas, CEO, Healthcare Informatics, Solutions and Services, Philips and Steve Mollenkopf, CEO, Qualcomm Inc. The panel discussion, moderated by CNBC’s co-host of "Squawk Alley" Jon Fortt, explores how mobile will fundamentally change our definitions of categories like smart home, wearables, automotive and healthcare. CES
38018
"SDC Management and Verification:
Real Intent, Inc.
38292
Trace Tutorial for ARM®
Trace functionality of ARM Cortex-M0+, M3, and M4 Processor and Keil MDK ARM
35193
"New Sillicon One Initiative",
Magma
34224
"2010 Success and Business
EVE
37361
Gunnar Scholl, CEO
PRO DESIGN Electronic GmbH
41401
Steve Pateras, Product
Interview with Steve Pateras, Product Marketing Director at Mentor Graphics Mentor Graphics
36862
"State and Future of
EDACafe.com
41547
Cadence announces Allegro
Interview with Brad Griffin, Product Marketing Director at Cadence. He talks about the tighter integration between Allegro and Sigrity in ASI 16.62 Release Cadence
38493
Harlem Shake as a Mixed
Harlem Shake "Do The Harlem Shake" voice detection circuit implemented in ViaDesigner. In 'shake' spoofs, the dancers usually move just a little until they here the deep voiced singer say "Do the Harlem Shake." What if you wanted to automate your robot doing the shake?

This video shows using a high-level design environment (ViaDesigner) to create a circuit to detect when the phrase occurs in the song.

The circuit 'plays' the song from a file-based voltage source that generates a 'music' wavefrom from raw wavefile values stored in the file data.txt. This music waveform contains all the frequency components of the song. To isolate the low frequency energy, the 'music' signal is sent through a 10th order continuous time bandpass filter. The filter attenuates frequencies outside of the 100 to 250 Hz range. The output of this filter then indicates when low frequency content is present in the song. Since the "Do the Harlem Shake" voice is so low (100 to 200 Hz) it will have higher output voltages when he starts talking.

The output of the bandpass filter is then applied to a voltage comparator with a fixed reference voltages. When the output of the filter exceeds this threshold voltage the comparator output goes high and clocks a D Flip/Flop asserting the DO_THE_HARLEM_SHAKE signal.

Yes, you can probably make a better Harlem Shake detector circuit.

This version makes a lot of naive assumptions: fixed/optimized input voltage levels, fixed slicing level to detect energy out of bandpass filter, doesn't discriminate other low frequency speakers and will only work if the circuit starts at the beginning of the song.

If you want to create a better version of the circuit feel free to download your own copy of ViaDesigner from ViaDesigner.com.

ViaDesigner is a power and easy-to-use mixed signal circuit design and simulation environment that allows you to combine schematics, VHDL, Verilog, and VHDL-AMS into one unified mixed signal simulation.
Triad Semiconductor
38295
ARM TechCon 2012 -- Keynote
Enabling the Super Devices of Tomorrow
Mobile computing devices are evolving faster than today's process technology can support. The solution is in the total system design. By employing a wide range of innovative system centric technologies, we can enable tomorrows workloads today.
ARM
38766
CR-8000 - Intelligent
Zuken's CR-8000 enables multiple engineers working on common projects to collaborate with others on the design team. The newest solution in the marketplace it takes advantage of the latest hardware and software architectures and has been designed from the start with embedded simulation and analysis. It also features tight integrations to state-of-the-art third-party verification solutions to improve results and reduce errors. Zuken
36625
"New Unity Signal Planner
Pulsic
27507
Synopsys, Inc.
45031
Michael Munsey, Director
Sanjay Gangal interviews Michael Munsey, Director of Semiconductor Strategy at Dassault Systemes at 2015 DAC Conference. Dassault Systemes America
36861
"Update: New Memory IP,
Cadence
36602
"New Pantheon 7 PCB/Hybrid/RF
Intercept Technology
31356
"Optimized MIPI Application
Virage Logic
36870
"Update on SystemC Synthesis
Forte Design Systems
30338
"New MultiSim 11 Release",
Nationan Instruments
29077
"Automate the Design
DownStream Technologies
30337
"New Easier Allegro Release",
Cadence
44242
Pete Tasker, Product Manager
Sanjay Gangal interviews Pete Tasker, Product Manager at XMOS at 2014 ARM TechCon XMOS
45047
Mark Gilbert, President
Sanjay Gangal interviews Mark Gilbert, President of EDA Careers at 2015 DAC Conference. EDA Careers
41512
SimVision Automatic Driver
Quick introduction to the Automatic Driver Trace features of SimVision including an overview of the signal tracing toolbar buttons, using those buttons to quickly trace to the root cause of any value (trace X is shown in the demo). Also an overview of the preferences users can set to affect the driver tracing algorithms is provided. The demo also covers sending items between windows once your trace is complete. In particular, the schematic browser is used within this demo to illustrate the driver tracing capabilities. Cadence
37343
Hayder Mrabet, CEO
Flexras Technologies
41521
10GBASE-KR Electrical
7 series FPGA GTH transceivers have achieved 100% electrical conformance to the 10GBASE-KR standard. In this video you'll see a Virtex®-7 FPGA pass the specification's receiver interference tolerance test over a 24" backplane. Xilinx
37352
Kazuyuki Kawauichi, President
JEDAT
38599
Altera to Build Next-Generation,
Learn More: http://bit.ly/Y6KFu4
Industry leaders discuss the impact of the Altera and Intel foundry relationship and the future manufacture of Altera FPGAs on Intel's 14 nm tri-gate transistor technology. These next-generation products, which target ultra-high-performance systems for military, wireline communications, cloud networking, and compute and storage applications, will enable breakthrough levels of performance and power efficiencies not otherwise possible.
Altera
37591
Optimizing the Design
AWR
36617
"All-in-one Design Environment
Altium
29060
"Symbol Generation Made
Valor
31061
"Designer Community Expo",
Synopsys Users Group, San Jose 2010
29584
Synopsys demonstrates
Synopsys, Inc.
37594
Fully Integrating 3D
AWR
41403
Michael Junipa, General
Interview with Michael Junipa, General manager at CheckPoint Technologies CheckPoint Technologies
38672
IESA Vision Summit 2013
Subramani Kengeri, Vice President Advanced Technology Architecture, GLOBALFOUNDRIES GLOBALFOUNDRIES
36849
"New ESL Verification,
GarySmithEDA
45068
Michiel Ligthart
Sanjay Gangal interviews Michiel Ligthart of Verific at 2015 DAC Conference. Verific
37369
Karl Kaiser, VP of Engineering
Esencia
45290
Ginni Rometty, IBM -
Mrs. Rometty was appointed President and CEO on January 1, 2012 and became Chairman of the Board of Directors on October 1 that same year. Mrs. Rometty began her career with IBM in 1981 in Detroit, Michigan and since then has held a series of leadership positions in IBM, most recently as Sr. VP and Group Executive, IBM Sales, Marketing and Strategy. In this role, she was responsible for business results in the 170 global markets in which IBM operates and pioneered IBM's rapid expansion in the emerging economies of the world. Prior to this, Mrs. Rometty served as Sr. VP, IBM Global Business Services, where she led the successful integration of PricewaterhouseCoopers Consulting. This acquisition was the largest in professional services history, creating a global team of more than 100,000 business consultants and services experts. IBM
41429
EMC simulation consumer
All consumer electronic devices need to meet EMC standards. By including EMC compliant design at an early stage, additional costly iterations can be avoided later on down the line. In this webinar we will present how board-level EMC design can significantly reduce emissions at their source. We will then focus on system level EMC, discussing different approaches of segmenting the system for an efficient simulation workflow. Finally we will analyze immunity, by demonstrating how different return current path configurations can affect performance of the device due to cable entry susceptibility. CST
44497
Mark Fields, Ford - Keynote
Mark Fields, President and CEO of Ford Motor Co delivers a keynote address at the 2015 International CES. During his keynote, Fields addresses what’s next for Ford and discuss the company’s commitment to innovation in all parts of its business. Ford
38043
"Ascent IIV Finds RTL
Real Intent, Inc.
37366
Rick Carlson, Vice President
Verific
37322
Raul Camposano, CEO
Nimbic
29438
"Live Demo of DDR3 IP in 65nm"
VirageLogic at DesignCon
41997
Vic Kulkarni, Senior VP and GM
Interview with Vic Kulkarni, Senior VP and GM at Ansys / Apache Apache
30955
ISQED Technical Program,
National Semiconductor
40454
Andrew McAfee: What will
Economist Andrew McAfee suggests that, yes, probably, droids will take our jobs -- or at least the kinds of jobs we know now. In this far-seeing talk, he thinks through what future jobs might look like, and how to educate coming generations to hold them.

TEDTalks is a daily video podcast of the best talks and performances from the TED Conference, where the world's leading thinkers and doers give the talk of their lives in 18 minutes (or less). Look for talks on Technology, Entertainment and Design -- plus science, business, global issues, the arts and much more.
Find closed captions and translated subtitles in many languages at http://www.ted.com/translate

Follow TED news on Twitter: http://www.twitter.com/tednews
Like TED on Facebook: https://www.facebook.com/TED

Subscribe to our channel: http://www.youtube.com/user/TEDtalksDirector
TED Talks
41510
Introduction to JasperGold
The JasperGold(R) Low Power Verification App is the only dedicated formal app for Low Power functional verification - enabling exhaustive verification of design functionality combined with the dynamic power optimization techniques. Jasper
36872
"OnPoint Root-Cause Analysis,
Vennsa Technologies
30341
"Productivity From Quality
Satin IP
41339
Implementing SHA 256
This video shows how easy it is to get started with the implementation of SHA-256 with C~. Check out the code on our github https://github.com/synflow/sha-256 Synflow
40580
Xilinx UltraScale™
Introducing industry's first ASIC-class programmable architecture that scales from 20nm planar through 16nm and beyond FinFET technologies, and from monolithic through 3D ICs. Xilinx
41513
SimVision Signal Comparison
Quick introduction to the capabilities of SimCompare. SimCompare is a very useful feature for comparing individual signals within the waveform window or entire databases of waveforms using the SimCompare Manager window. Both are covered in this demo video. Firstly, the demo covers how a user can quickly create comparisons in the waveform window itself through simple selection of two signals. The SimCompare Manager is then launched to perform a more comprehensive comparison of all signals within two waveform databases starting from a particular level of hierarchy downwards. The results are viewed in the waveform window in both a hierarchical and a time-based view. The SimCompare Manager is used to tweak the comparison to verify whether the two waveform databases are, indeed, similar from a certain point forward and to track down what might be causing the difference. Finally, SimCompare is launched in batch mode to perform a similar comparison. Cadence
38593
Samsung Unveils Galaxy S4
Relive the Samsung UNPACKED experience, and be one of the first in the world to see the #TheNextGalaxy, the GALAXY S 4.

The GALAXY S 4 gets you closer to what matters in life, and brings your world together.

For a richer, simpler and fuller life.

To find out more, click here http://www.samsung.com/galaxys4/
Samsung Semiconductor
37595
Electrical-Thermal Coupled
AWR
29079
"New Test Integration",
Nationan Instruments
45293
Dr. Herbert Diess, Volkswagen
July 1, 2015, Dr. Diess was appointed as Member of the Board of Management of Volkswagen AG and Chairman of the Board of Management of the Volkswagen Passenger Cars brand. Prior to this appointment, Dr. Diess held several positions at BMW AG and Robert Bosch GmBH. He studied vehicle technology at Munich University of Applied Sciences in 1977 and then mechanical engineering at Munich Technical University from 1978 to 1983. After obtaining his degree in engineering, Diess was a scientific assistant at the Institute for Tool Machines and Plant Management of Munich Technical University, where he obtained a doctorate in the field of assembly automation in 1987. CES
37313
John S. Zuk, Vice President
Tanner EDA
37592
Linking RF Design Thru to Test
AWR
45223
Paul Kingsepp, Product Manager
Sanjay Gangal interviews Paul Kingsepp, Product Manager of SL Power Electronics at 2015 ITC. SL Power Electronics
45033
Mike Gianfagna, VP of
Sanjay Gangal interviews Mike Gianfagna, VP of Marketing at eSilicon at 2015 DAC Conference. eSilicon
30339
"Expert Customer Collarboration",
Sunstone Circuits
33187
"Enhancements for Mobile
Scintera Networks
45291
Reed Hastings, Netflix
Reed Hastings co-founded Netflix in 1997. In 1991, Reed founded Pure Software, which made tools for software developers. After a 1995 IPO, and several acquisitions, Pure was acquired by Rational Software in 1997. Reed is an active educational philanthropist and served on the California State Board of Education from 2000 to 2004. He is currently on the board of several educational organizations including CCSA, Dreambox Learning, KIPP and Pahara. Reed is also a board member of Facebook, and was on the board of Microsoft from 2007 to 2012. CES
36867
"BugScope Assertion Synthesis
NextOp Software
44487
Panasonic CES 2015 Press
Panasonic kicked off the International Consumer Electronics Show at the CES Press Conference. Watch to learn what Panasonic shared with CES registered media and industry analysts. Learn more at www.panasonic.com/ces Panasonic
44493
The Next Big Thing: New
Join CNET superstars Brian Cooley, Tim Stevens and a panel of luminaries discussing the exciting future of virtual and augmented reality. How will these technologies impact gaming? Driving? Entertainment?  Life? We explore the imminent change VR and AR will bring. CNET
41397
Peter van den Eijnden,
Interview with Peter van den Eijnden, CEO and MD of JTAG Technologies JTAG Technologies
35225
"Launching Nimbic, B
Nimbic
39308
DesignWest Improv in San Jose
We asked the DesignWest 2013 participants to show their stand-up-comedic talents and they came through in a big way in the following hilarious acts. These are the rising stars in the Techie Stand up Comedy World. You may see them in the future at an 'Improv' theater. But just know that you saw them here first. EDACafe.Com
31780
General Principles Behind
OSCI TLM-2.0 Standard and Synthesis Subset Tutorial
35135
"Lynx Design System Update:
Synopsys
41390
Simulation of EMI in
This webcast will explore the simulation of hybrid cable design using CST CABLE STUDIO and will look at the prediction of EMI levels. An increasing trend in the industry is to combine power and control cables into a single hybrid cable design, reducing the complexity of the system and cost. However, without careful design, high voltage power switching transients may lead to unwanted electromagnetic interference. Typical hybrid cable design parameters may include the separation between conductors, twist rate of twisted pairs, shielding and screen types. Topics covered will include the modeling of shield transfer impedance, crosstalk and induced common mode currents. CST
44484
Sony CES 2015 press conference
Sony CES 2015 press conference Sony
30653
AWR TV: Tutorial Using
AWR
35148
"New DFM Services for
Cadence
40752
4 Steps to Bring Up a
This video demonstrates the world's first all programmable heterogeneous FPGA interfacing to a CFP2 Optical Module. The demo walks through 4 steps required to bring up the system and then shows how Xilinx simplifies the integration process. Xilinx
36851
"New Reqs: Job Hunters
EDA Careers
36863
"SystemVerilog Made Easy:
Verific
29377
"Ultra Low-Power Analog
Cambridge Analog Technologies
37593
Improve Microwave Circuit
AWR
42016
Colin Walls, Software
Interview with Colin Walls, Outbound Marketing Manager and Embedded Software Technologist at Mentor Graphics Mentor
44482
2015 CES KEYNOTE ADDRESS
2015 CES KEYNOTE ADDRESS by BK YOON Samsung Semiconductor
37034
New 12Gb/s SAS and NVM
Cadence
39007
Keller Rinaudo: A mini
Your smartphone may feel like a friend -- but a true friend would give you a smile once in a while. At TED2013, Keller Rinaudo demos Romo, the smartphone-powered mini robot who can motor along with you on a walk, slide you a cup of coffee across the table, and react to you with programmable expressions.

TEDTalks is a daily video podcast of the best talks and performances from the TED Conference, where the world's leading thinkers and doers give the talk of their lives in 18 minutes (or less). Look for talks on Technology, Entertainment and Design -- plus science, business, global issues, the arts and much more.
Find closed captions and translated subtitles in many languages at http://www.ted.com/translate

Follow TED news on Twitter: http://www.twitter.com/tednews
Like TED on Facebook: https://www.facebook.com/TED

Subscribe to our channel: http://www.youtube.com/user/TEDtalksDirector
TED Talks
36608
"Does Analog Design Need
Tanner EDA
44234
Franz Maidl, Director
Interview with Franz Maidl, Director Global Tasking Business at Altium at 2014 ARM TechCon. Altium
36844
"New DesignerUVM for
Axiom Design Automation
35163
"TSMC Partnership, System
Cadence
37587
IMS 2012 MicroApps -
AWR
38017
"New Ascent Lint 2.0
Real Intent, Inc.
45295
Dr. WP Hong, Samsung
Dr. WP Hong is an established IT and mobile industry leader, who is currently the President of Solution Business Unit, Samsung SDS. Before assuming the current position, he played a critical role in Samsung mobile’s emergence as the world’s premiere handset manufacturer and eco-system provider, by introducing the GALAXY franchise to Samsung’s mobile portfolio and by strengthening Samsung’s content services for both Samsung’s mobile devices and its digital appliances. Prior to joining Samsung, he accumulated experience in the mobile industry both as a researcher and business person on the cutting edge of mobile technology innovations. Samsung Semiconductor
30369
"New Encounter Digital
Cadence
35250
"New Visual Verification
Blue Pearl Software
44226
Tom Borgstrom, Director
Interview with Tom Borgstrom, Director of Marketing at Synopsys at 2014 ARM TechCon. Synopsys
30952
New Approaches to Parasitic
Mentor Graphics
37123
AWR 2011 "What’s New"
AWR
44485
CES 2015 Samsung Press
CES 2015 Samsung Press Conference Samsung Semiconductor
42015
Mladen Nizic
Interview with Mladen Nizic, Director of Engineering, Mixed Signal Solutions at Cadence Cadence
41399
Kiran Vittal, Senior Director
Interview with Kiran Vittal, Senior Director, Product Marketing at Atrenta Atrenta
43881
Deepak Kumar Tala, CEO
Interview with Deepak Kumar Tala, CEO of SmartDV Technologies at the 2014 DAC SmartDV Technologies
44271
Choon-Leong Lou, CEO
Sanjay Gangal interviews Choon-Leong Lou, CEO at Star Technologies at the 2014 International Test Conference (ITC) STAr Technologies
40775
Simulation of Phased
A new method of simulating large‐scale, phased‐array networks will be presented. This capability will allow for the analysis and evaluation of large arrays, with thousands of elements, in seconds instead of hours. It can include the entire T/R module chain and model the effect of noise, non‐linearities and frequency dependencies. Forward and reverse leakage and isolation effects are also inherently part of this solution. Each T/R module can have independent digital control of its amplitude and phase state, along with the inclusion of fault states and Monte Carlo effects on array performance. Finally this array can then be included as part of an overall analysis of the entire radar system to model RF, DSP and effects such as clutter and jamming, to evaluate performance under real‐world conditions. Agilent EESof
34435
"Verification Academy
Mentor Graphics
35145
"New AMBA 4 Hardware
ARM
43462
Shishir Gupta, V.P. Sales
Interview with Shishir Gupta, V.P. Sales & Marketing at TrueChip TrueChip
43901
Ivan Petkov, Business
Interview with Ivan Petkov, Business Development Manager at Allegro DVT at 2014 Design Automation Conference. Allegro DVT
30370
"Cadence Online Community",
Cadence
30595
Jill Jacobs Interviews
EDACafe
30661
"Verification IP",
Sandeep
nSys
30960
Field Solver Parasitic
Silicon Frontline
35937
Pantheon 7: Complex Design
Intercept Technologies
45527
Hagai Arbel, Founder and CEO
Sanjay Gangal interviews Hagai Arbel, Founder and CEO of Vtool at 2016 DAC. Vtool
31834
Scott Meeth on Jasper
Jasper Design Automation
35147
"Virtual Prototyping
Synopsys
45522
Chouki Aktouf, President
Sanjay Gangal interviews Chouki Aktouf, President and CEO of Defacto Technologies at 2016 DAC. Defacto Tech
31951
Where High-level Synthesis
OSCI TLM-2.0 Standard and Synthesis Subset Tutorial
41406
Ken Harris, Director
Interview with Ken Harris, Director of Marketing at PDF Solutions PDF Solutions
30592
Paul Marriott
Xtreme EDA
40455
Take advantage of the massively parallel capabilities of the Intel® Xeon Phi™ coprocessor. Should you add Intel® Xeon Phi™ coprocessor to your Intel® Xeon® processor-based servers to increase your workload productivity? If yes, like this animation! Learn more at: www.intel.com/xeonphi Intel
45546
Louie De Luna, Director
Sanjay Gangal interviews with Louie De Luna, Director of Marketing and Krzysztof Szczur, Technical Support Manager of Aldec at 2016 DAC. Aldec
30348
"USB IP Demo Running
Synopsys
37589
RF System Design - Moving
AWR
37004
"New Virtualizer Development
Synopsys
30589
Filip Thoen
Synopsys
30149
Synopsys and MCCI SuperSpeed
Synopsys, Inc.
40894
Vivado XDC Macro Creation
The XDC Macro is a new physical constraint object that enables relative placement specification during implementation. Learn how to create post-synthesis macros using new XDC constraints. Essential knowledge for users of RPMs. For More Vivado Tutorials please visit: www.xilinx.com/training/vivado Xilinx
45072
Alex Tesler, President and CEO
Sanjay Gangal interviews Alex Tesler, President and CEO of IP Cores at 2015 DAC Conference. IP Cores, Inc
30918
Preview: Asset Lifecycle
Dassault Systemes Enovia
35165
"Design Quality Measurement
Satin Technologies
38492
Gunnar Scholl, CEO
Interview with Gunnar Scholl of CEO at DVCon 2013. PRO DESIGN Electronic GmbH
39530
Keith Barry: Brain magic
http://www.ted.com First, Keith Barry shows us how our brains can fool our bodies -- in a trick that works via podcast too. Then he involves the audience in some jaw-dropping (and even a bit dangerous) feats of brain magic.

TEDTalks is a daily video podcast of the best talks and performances from the TED Conference, where the world's leading thinkers and doers give the talk of their lives in 18 minutes. TED stands for Technology, Entertainment, Design, and TEDTalks cover these topics as well as science, business, development and the arts. Closed captions and translated subtitles in a variety of languages are now available on TED.com, at http://www.ted.com/translate.

Follow us on Twitter
http://www.twitter.com/tednews

Checkout our Facebook page for TED exclusives
https://www.facebook.com/TED
TED Talks
35166
"Design Script Management
Ellexus
40435
Research@Intel 2013:
In his address to the attendees of Intel Labs' signature event, Research@Intel, CTO Justin Rattner welcomes visitors to seek out four zones of innovation on the exhibit floor : The Data Society, Intelligent Everything, Enriching Lives, and Tech Essentials. He also provides an update on the growth of Intel Labs' Intel Science and Technology Centers. Also on stage: a demo on measuring brain activity and what it means in monitoring actions such as driving; and stories of the future with Steve Brown, Intel Futurist and Chief Evangelist; Maria Bezaitis, Principal Engineer; Jennifer Healey, Research Scientist. Intel
37336
Rick Carlson, Vice President
Verific
30617
"New PCIe Verification
ExpertIO
39309
MIO and EMIO Configuration
Learn how MIO and EMIO relate and how to bring a signal out to the "real world" using the preferred PlanAhead/XPS flow. For More Zynq Tutorials please visit: www.xilinx.com/training/zynq Xilinx
44748
Mark Gilbert, President
Sanjay Gangal interviews Mark Gilbert, President of EDA-CAREERS at 2015 DVCon. EDA Careers
36092
T-Tech's QCJ5...PCB prototyping
T-Tech, Inc.
45051
Jean-Marie Brunet, Director
Sanjay Gangal interviews Jean-Marie Brunet, Director of Marketing, Emulation Division of Mentor Graphics at 2015 DAC Conference. Mentor Graphics
31578
"ESL: Where We're Going",
OSCI
30604
"New Standards",
Shrenik
Accellera
45541
Sung-Hwan Oh, President & CEO
Sanjay Gangal interviews Sung-Hwan Oh, President & CEO of Entasys Design at 2016 DAC. Entasys Design
45521
Ellis Smith, CEO
Sanjay Gangal interviews Ellis Smith, CEO of Blue Pearl Software at 2016 DAC Blue Pearl Software
35167
"Artisan Physical IP
ARM
30655
AWR TV: Problem with
AWR
41400
Mike Vachon, Group Director
Interview with Mike Vachon, Group Director, R&D at Cadence Design Systems Cadence
44483
CES 2015 LG Press Conference
CES 2015 LG Press Conference LG
41472
Vivado HLS Technical
Vivado HLS contributes to overall system power reduction, reduced bill of materials cost, increased system performance and accelerated design productivity. We'll show you how to create a more efficient specification using C, C++, or SystemC. For More Vivado Tutorials please visit: www.xilinx.com/training/vivado Xilinx
35156
"Whole Product Development
Dassault Systemes America
37006
"New Versatile Audio
Synopsys
45309
Mohit Gupta, Dir of Product
Sanjay Gangal interviews Mohit Gupta, Director of Product Marketing of Rambus and Kelvin Low, Senior Director of Samsung at DesignCon 2016. Rambus and Samsung
40953
Understanding Vivado
Learn about changes to transceiver based IP cores in Vivado 2013.3 to help users instantiate multiple cores, debug transceivers and keep top level changes in tact when upgrading to newer versions of the IP core. Initial adoption of the IP cores though disruptive, are designed to shorten design cycles and provide a seamless flow for development and debug. For More Vivado Tutorials please visit: www.xilinx.com/training/vivado Xilinx
36923
"PCB Design Part 4 –
AWR
41998
Glenn Woppman, President
Interview with Glenn Woppman, President of Asset Intertech Asset Intertech
30590
"OSCI Day", Steve Svoboda
Cadence
41999
Dr. John Logan
Interview with Dr. John Logan, Sr. Manager Sensor Engineering at Atmel Atmel
35835
New Synopsys Insight
Synopsys
35454
Interview with Aart de Geus
EDAC Kaufman Award Dinner 2010
41075
Heterogeneous Multicore
Learn how to create a heterogeneous multicore system consisting of the ARM Cortex A9 processor on the processing system and a Microblaze processor on the programmable logic using Vivado. Then we will export the hardware to the software development kit and move through the step-by-step process on how to use the system debugger. For More Zynq Tutorials please visit: www.xilinx.com/training/zynq Xilinx
38042
"Expanding World-Wide
Real Intent, Inc.
30591
"OSCI Day",
Tony Fama
CoWare
37033
"Don't Miss the Bus with
Synopsys
38677
Introducing Samsung GALAXY S4
Developed to redefine the way we live, the GALAXY S4 makes every moment of our life meaningful. It understands the value of relationships, enables true connections with friends and family, and believes in the importance of effortless experience.

Highly crafted design with a larger screen and battery, thin bezel, housed in a light 130g and slim 7.9mm chassis. The new Samsung GALAXY S4 is slimmer, yet stronger.

The GALAXY S4 gets you closer to what matters in life, and brings your world together.

For a richer, simpler and fuller life.

To find out more, click here http://www.samsung.com/galaxys4/
Samsung Semiconductor
34450
"Vista ESL Verification
Mentor Graphics
41079
Two Reasons Why Auto-Adaptive
Systems with high speed serial links often have serial channels which result in signal distortion described as insertion loss, reflection, cross-talk, and other channel impairments. Receiver equalization can help compensate for such channel-driven losses and distortions, but link tuning and bring-up can be non-trivial even for the most experienced transceiver and signal integrity specialists. In this video, you'll learn how Xilinx FPGAs with fully auto-adaptive equalization is critical to high speed transceiver design and enables system designers to get their systems up and running quickly. Xilinx
45383
Mark Gilbert, President
Sanjay Gangal interviews Mark Gilbert, President of EDA Careers at 2016 DVCon. EDA Careers
44229
Prithi Ramakrishnan,
Interview with Prithi Ramakrishnan, Product Marketing Manager at Sunrise Micro Devices at the 2014 ARM TechCon Sunrise Micro Devices
42539
Todd Hatfield (HP) and
Interview with Todd Hatfield, Design Jet large format category manager at HP and Steve Blanken of Contex Hewlett-Packard
40581
TSV and Interposer modeling,
3D ICs promise "more than Moore" integration by packing a lot of functionality into small form factors. Interposers along with TSVs play an important role in 3D integration from an electrical, thermal and mechanical point of view.
The goal of this webinar is to demonstrate a complete design methodology for TSVs used in interposers by means of three 3D full wave electromagnetic simulations.
A comparative analysis of various configurations of signal delivery networks in 3D interposers for high speed signal transmission is presented. Based on the results, design guidelines are outlined with the objective of minimizing the crosstalk among TSVs, reducing the insertion loss and generally improving the electrical performance of interconnections in silicon and glass interposers
CST
43874
Gene Matter, VP Applications
Interview with Gene Matter of Docea Power at the 2014 DAC DOCEA Power
45314
Greg Roberts, Director
Sanjay Gangal interviews Greg Roberts, Director of Marketing of EMA Design Automation at DesignCon 2016. EMA Design Automation
44237
Neil Hand, Vice President
Sanjay Gangal interviews Neil Hand, Vice President of Marketing at Codasip at 2014 ARM TechCon. Codasip
41407
Jim Johnson & Dr. Hans
Interview with Jim Johnson, President, Silicon Aid Solutions & Dr. Hans Manhaeve CEO, Ridgetop Europe Silicon Aid Solutions & Ridgetop Europe
30954
ISQED Quality Award Winner:
UC Berkeley, EECS Dept.
37003
"Critical Mass for Systemic
SNUG 2012
45544
Ranjit Adhikary, VP of
Sanjay Gangal interviews Ranjit Adhikary, VP of Marketing of ClioSoft at 2016 DAC. Cliosoft
36621
"New MIPI Customer Success
Mixel
36868
"Update: Merger, New
Accellera Systems Initiative
44236
Mark Gilbert, President
Sanjay Gangal interviews Mark Gilbert, President at EDA Careers at 2014 ARM TechCon. EDA Careers
31836
Brian Bailey on Jasper
Jasper Design Automation
38016
"Design and Verification
Real Intent, Inc.
40778
Advances in Load Pull
Power amplifier designers widely use load pull to determine the optimal load impedances to present to their device(s) at fundamental and harmonic frequencies. This presentation discusses methods of examining and using measured load pull data and also recent advances in load pull simulation and post-processing analysis when you have a nonlinear device model available. Agilent ADS enables you to more completely understand the capabilities of your measured device or device model and design power amplifiers with more optimal performance. Agilent EESof
38462
Brett Cline, V.P. of
Interview with Brett Cline, V.P. of Marketing & Sales at Forte Design Systems Forte Design
45289
Brian Krzanich, Intel
Brian M. Krzanich was appointed chief executive officer of Intel Corporation and elected a member of the board of directors on May 16, 2013. He is the sixth CEO in the company's history, succeeding Paul S. Otellini. Krzanich has progressed through a series of technical and leadership roles at Intel, most recently serving as the COO since January 2012. His open-minded approach to problem solving and listening to customers' needs has extended the company's product and technology leadership and created billions of dollars in value for the company. Intel
36922
"PCB Design Part 3 –
AWR
40774
Creating and Analyzing
Today's radar and electronic warfare (EW) equipment operate in increasingly cluttered RF and microwave spectral environments in the military theatre. Evaluating radar/EW hardware under a variety of emitter test signal scenarios helps determine the system performance in the presence of potential interference. Co‐existence between radar and wireless systems can be a significant issue. Capturing actual waveforms in the field and playing them back in the lab environment has utility in creating realistic spectral environments for hardware Device‐Under‐Test (DUT) evaluation. It may also be useful to modify a captured spectral environment with additional emitters to evaluate hardware in the lab environment over a number of different signal scenarios. This presentation will show how wide‐bandwidth, multi‐channel digitizers can be used to capture and analyze signals. Vector Signal Analysis (VSA) software will be used to both capture and analyze emitters. The captured signals will then be modified with design simulation software to add additional radar and wireless emitters to generate complex multi‐emitter test signals using a high precision Arbitrary Waveform Generator (AWG) and high performance signal generator. Coexistence and interference issues between radar and wireless emitters will be examined. Agilent EESof
39666
NVIDIA GRID vGPU Technology
Check out the incredible demos of NVIDIA GRID vGPU technology running on Citrix XenDesktop 7, shown on stage by NVIDIA CEO Jen-Hsun Huang and Citrix CEO Mark Templeton at Citrix Synergy. Includes five workstation-class applications running on a single Mac! Nvidia
31312
Setting up Prodigy -
Tanner EDA
36921
"PCB Design Part 2 –
AWR
38489
Mark Gilbert, President
Interview with Mark Gilbert, President of EDA Careers. EDA Careers
39317
Targeting Zynq Using
Learn how Vivado IP Integrator can be used to rapidly configure a Zynq processor and connect it via AXI4 to a video accelerator running in the programmable fabric of the device. Using built in board aware design rule checks and designer automation, Vivado can greatly improve user productivity. For More Vivado Tutorials please visit: www.xilinx.com/training/vivado Xilinx
41211
Using IP/SoC Executable
The need to meet the ever-shorter time-to-market window, as well as the need to focus on core competence, has led to a steep increase in the adoption and integration of 3rd party Semiconductor IP (SIP) to meet today's SoC development challenges. While the adoption of SIP increases productively and enables innovation, it also introduces new challenges for interface specification, integration and verification on a large scale.

This video showcases the combined solutions from Duolog and Jasper that alleviate the time-consuming and error-prone tasks associated with SIP-based SoC integration and verification. The collective Duolog and Jasper flow enables design teams to quickly and accurately detect issues, inconsistencies and omission when assembling complex SIP-based systems. The integrated design flows enable designers to work from black-box system specifications, through design capture and assembly, to verification. Development teams can verify the correctness of both the specification and the implementation, while also detecting exclusions in the specification.
Jasper
45038
Natasha Baker, Founder
Sanjay Gangal interviews Natasha Baker, Founder of SnapEDA at 2015 DAC Conference. SnapEDA
36843
"3 Conferences in March:
International Society for Quality Electronic Design
44396
Scott Hamilton, Dell
Jeff Rowe interviews Scott Hamilton, Dell Precision Specialist at 2014 Autodesk University. Dell Inc.
36869
"New Discovery Verification
Synopsys
42533
Scott Hamilton
Interview with Scott Hamilton, Vertical Market Strategist at Dell Dell Inc.
45533
Khan Kibria, CEO
Sanjay Gangal interviews Khan Kibria, CEO of SoCScape at 2016 DAC. SoCScape
42532
Tom Salomone
Interview with Tom Salomone, Worldwide Manufacturing & AEC Segment Manager at Lenovo Lenovo
45525
Rupert Baines, CEO
Sanjay Gangal interviews Rupert Baines, CEO of UltraSoc at 2016 DAC. UltraSoC
36832
"Launching New Verdi3
SpringSoft
45524
Ashraf Takla, CEO
Sanjay Gangal interviews Ashraf Takla, CEO of Mixel at 2016 DAC. Mixel
29364
"New ADC Converter IP",
asicNorth
41404
Pat Shaughnessy
Interview with Pat Shaughnessy, US Distributor for XJTag XJTag
39005
First Look: Industry's
See Altera successfully demonstrate 32 Gbps transceiver performance on 20 nm silicon developed on TSMC's 20SoC process technology. These 20 nm transceivers feature the lowest power consumption, fastest timing closure, and superior signal integrity needed for the most demanding applications. Learn more: http://bit.ly/14ZKOXW Altera
41222
Hardware/Software Cross-Trigger
Learn how Xilinx embedded design tools support advanced co-debug features like hardwdare software cross-trigger. Your designers can quickly capture and debug system interaction between the application, hardware design, and the target processor. For More Zynq Tutorials please visit: www.xilinx.com/training/zynq

Related Links:
Download Xilinx SDK
http://www.xilinx.com/tools/sdk.htm

Vivado Embedded Processor Tutorial
http://xgoogle.xilinx.com/search?getfields=*&numgm=5&filter=0&proxystylesheet=support&client=support&site=Answers_Docs_Forums&q=UG940&getfields=*&ie=UTF-8&num=1000&oe=UTF-8&output=xml_no_dtd&requiredfields=-Archived%3Atrue&show_dynamic_navigation=1&sort=date%3AD%3AL%3Ad1&lang2search=
Xilinx
36924
"PCB Design Part 5 –
AWR
44727
David Reyes, Area Sales
Sanjay Gangal interviews David Reyes, Area Sales Manager from JBC Tools at 2015 IPC/Apex Expo. JBC Tools
30594
"OSCI Day", Shabtay Matalon
Mentor Graphics
34432
"Everyone Wins with New
Mentor Graphics
38675
Accelerating DSP Design
Designers tasked with delivering more capability and performance in today's sophisticated DSP applications are increasingly turning to programmable logic for their hardware solutions. Xilinx® 7 series FPGAs meet this demand with a family of devices uniquely developed to address specific market needs including high performance, low cost, and low power. Xilinx 7 series DSP design platforms accelerate development of DSP applications by reducing schedule risk, enabling design reuse, and introducing new high-level design methodologies. For additional video and instructor-led trainings please visit: www.xilinx.com/training

Check out the White Paper
http://www.xilinx.com/support/documentation/white_papers/wp406-DSP-Design-Productivity.pdf

Visit the Xilinx DSP landing page:
http://www.xilinx.com/products/technology/dsp/index.htm
Xilinx
40893
Using Vivado Serial IO
Learn how to use the new integrated Vivado serial I/O analyzer. You will be shown how to customize an IBERT design using the Manage IP flow, create IBERT design example, and perform basic serial I/O analysis. For More Vivado Tutorials please visit: www.xilinx.com/training/vivado Xilinx
37007
"SNUG Technical Program
SNUG 2012
44486
CES 2015: Sharp Press
Watch Sharp unveil their newest products for 2015 in the official Sharp CES 2015 press conference. Sharp
41077
Blinky Project with MDK-ARM
Get started today with MDK-ARM Version 5. Watch how easy it is to create applications using the new Run-Time Environment ARM
31148
Synopsys DesignWare DDR3/2
Synopsys, Inc.
31149
Synopsys Demonstrates
Synopsys, Inc.
41810
SoC Sign-off Needs Analysis
Pranav Ashar, CTO at Real Intent, speaks with Graham Bell on how verification sign-off now must include analysis of reset and design initialization to ensure it is correct and optimal for various power modes in an SoC. This interview took place in May 2013. Real Intent, Inc.
45317
Dave Kohlmeier, Dir of
Sanjay Gangal interviews Dave Kohlmeier, Dir of Simulation and Analysis Product of Mentor Graphics at DesignCon 2016 Mentor Graphics
39010
Blinky Project with MDK-ARM
ARM
42000
Dave Kelf, V.P.
Interview with Dave Kelf, V.P. of Marketing at OneSpin Solutions OneSpin Solutions
31310
Accelerating Schematic
Tanner EDA
39783
5.23.13 15th Annual Top
Speakers:
David Cowan, Partner, Bessemer Venture Partners
Venky Ganesan, Managing Director, Menlo Ventures
Steve Jurvetson, Managing Director, Draper Fisher Jurvetson
Alfred Lin, Partner, Sequoia Capital
George Zachary, General Partner, Charles River Ventures

Moderator:
Mike Perlis, President & CEO, Forbes Media
Bruce Upbin, Managing Editor, Forbes Media

What trends that aren't obvious today will see explosive growth in about five years' time? Find out at one of the Churchill Club's most anticipated events of the year: the 15th Annual Top 10 Tech Trends debate. Be sure to get your seat as five luminaries from Forbes' 2013 Midas List of the world's most successful venture capitalists predict and evaluate their exciting top 10 trends. And our usual live audience of Silicon Valley's best and brightest—all with opinions of your own—will be asked to agree or disagree.
ibsystems
40781
A Practical Approach
This webcast will introduce a new fast mismatch analysis that delivers the same level of accuracy with the benefit of significantly reducing overall cost, verification time and increased computed resource availability. Agilent EESof
36846
"New Conference on Sensors
SensorsCon 2012
45520
Cheng Wang, Senior VP
Sanjay Gangal interviews Cheng Wang, Senior VP Engineering of Flex Logix at 2016 DAC. Flex Logix
36928
AXIEM 2011 – Parmeterized
AWR
30903
Protocol Certification
Jasper Design Automation
42534
Sean Young
Interview with Sean Young, Worldwide Segment Manager, Product Development & AEC at HP Hewlett-Packard Workstations
40449
Principles of Schematics
Ben goes over schematics, a basic part of any electronics project. He shows what the symbols mean and how to go from schematic to working project.

New episodes every Sunday!

Enter to win a Raspberry Pi-powered Gaming Console: http://www.element14.com/community/events/3707?ICID=bh-rpigame-giveaway

Be sure to share, like and comment this video: http://youtu.be/oIRsMBVuSS4

Subscribe for more projects and mods: http://www.youtube.com/subscription_center?add_user=thebenheckshow

Check out more of Ben's work: http://www.youtube.com/thebenheckshow

--
Connect with The Ben Heck Show for more projects and tips
Twitter: https://twitter.com/benheck
Facebook: https://www.facebook.com/BenHeckShow
Google+: http://gplus.to/thebenheckshow
The Ben Heck Show
43919
Brian Daellenbach, President
Interview with Brian Daellenbach, President, at Northwest Logic at 2014 Design Automation Conference. Northwest Logic
38464
Interview with Vishal Moondhra, VP Applications at Methodics. Methodics
40436
Human-Centered Design
Tony Santos, User Experience Lead at Mozilla and OSCON 2013 Speaker, talks about Human Centered Design and how it is taking the world by storm. TED Talks
31372
"ESL: What A Long Strange
OSCI
40896
Compilation Units in
Learn about compilation units and how Vivado organizes them for mixed Verilog and SystemVerilog projects. Compilation units impact the scope of user definitions and also restrict the scope of compiler directives. Vivado has the ability to let you put all files into a single compilation unit through the file_type property. For More Vivado Tutorials please visit: www.xilinx.com/training/vivado Xilinx
41413
Standup Comedian - Jayshree
Jayshree Desai tells a joke at the ITC Conference Defacto Tech
153438
Michael Norman, Product
Sanjay Gangal interviews Michael Norman, Product Line Manager of NXP at 2016 ARM TechCon Conference. NXP
30593
"Ten Years of OSCI",
Open SystemC Initiative
43877
Olivier Lauzeral, President
Interview with Olivier Lauzeral, President of IROC Technologies IROC Technologies
40445
The ARM University Program,
This video will introduce you to the fundamentals of the most
popular embedded processing architectures in the world today, namely
the ARM architectures.
ARM
44645
Michael Alam, CEO
Sanjay Gangal interviews Michael Alam, CEO from Valydate at 2015 DesignCon. Valydate
45543
Dr. Michael Doyle, Director
Sanjay Gangal interviews Dr Michael Doyle, Director and Principal Scientist and Scientific Innovation Wizard of Dassault Systemes at 2016 DAC. Dassault Systèmes America
36929
VSS & LabVIEW Integration
AWR
45389
Rob van Blommestein,
Sanjay Gangal interviews Rob van Blommestein VP of Marketing of S2C at 2016 DVCon. S2C
38673
ARM DS-5 using a NI-DAQ
This video is designed to get you started collecting energy data using a NI-DAQ device and ARM Streamline Performance Anyalzer. ARM
41078
Agilent Genesys Filter
In this video we will discuss how to setup and use several of the Agilent EEsof EDA Genesys filter synthesis tools.

For more information see http://www.agilent.com/find/eesof-genesys-filter
Agilent EESof
38376
Sigma Delta Mixer Design
Screencast of using Triad Semi`s ViaDesigner mixed-signal design software to create and simulate a 3-channel sigma-delta mixer circuit. The circuit accepts three analog waveforms, digitizes each analog input with an sigma-delta modulator, the 3 1-bit digital streams are summed by a digital mixer, the resultant 2-bit vector is passed to a hand-crafted digital to analog converter, the output of the DAC is smoothed by a continuous time low-pass filter created with a ViaDesigner wizard. The results are simulated and displayed in the waveform viewer. Triad Semiconductor
29358
"ISQED 2010 Call for
Intl Symposium on Quality in Electronic Design
45526
Felicia James, CEO
Sanjay Gangal interviews Felicia James, CEO of Zipalog at 2016 DAC. Zipalog
43917
Harry Foster, Chief Verification
Harry Foster, Chief Verification Scientist at Mentor Graphics at 2014 Design Automation Conference. Mentor Graphics
45064
Bernie DeLay, Group Director
Sanjay Gangal interviews Bernie DeLay, Group Director R&D of Synopsys at 2015 DAC Conference. Synopsys
36845
"New Interdisciplinary
The Interdisciplinary Engineering Design Education Conference
40437
Research@Intel 2013:
The concept of adding "intelligence" to the things around us means having a world where sensors and compute devices make life easier. In this overview of the "Intelligent Everything Zone," Divya Kolar, a Tech Evangelist with Intel Labs, guides us through demos showing how intelligent devices can capture data about how we live and what we do... and make it useful. Intel
43879
"New Ascent Lint, MathWorks
Interview with Graham Bell, V.P. Marketing at Real Intent discussing the new Ascent Lint release, MathWorks Integration, DAC partner activities. Real Intent, Inc.
43872
Chouki Aktouf, CEO
Interview with Chouki Aktouf, CEO of Defacto Technologies Defacto Tech
44750
Veloce: Driving Emulation Use
Sanjay Gangal interviews Jean-Marie Brunet, Director of Marketing Emulation of Mentor Graphics at 2015 DVCon. Mentor Graphics
40444
Rambus Inventor Profile
Elke DeMulder, Research Scientist for Cryptography Research, demonstrates how field programmable gate arrays (FPGAs) can be compromised by side-channel attacks. Rambus
44753
Rob van Blommestein,
Sanjay Gangal interviews Rob van Blommestein, VP of Marketing of S2C at 2015 DVCon. S2C
37032
"Expo has 7 Different
SNUG 2012
34340
"New Open and Expanded
Cadence
45316
Dave Wiens, Director
Sanjay Gangal interviews Dave Wiens, Director Business Development of Mentor Graphics at DesignCon 2016. Mentor Graphics
30780
Ahmed Khebir
ElectroMagneticWorks
45060
David Dutton, CEO
Sanjay Gangal interviews David Dutton, CEO of Silvaco at 2015 DAC Conference. Silvaco
41833
Sundar Iyer, CEO
Interview with Sundar Iyer, Co-founder & CEO of Memoir Systems. Memoir Systems
45313
Bob Smith, Executive Director
Sanjay Gangal interviews Bob Smith, Executive Director of EDA Consortium at DesignCon 2016. EDA Consortium
43608
How to Create Zynq Boot
Learn how to create Zynq Boot Image using the Xilinx SDK. We'll review the boot parameters and partitions that can be selected/added while creating a Zynq Boot Image through the Xilinx SDK. Lastly we'll dive into the utility with a quick demonstration. For More Zynq Tutorials please visit: http://www.xilinx.com/training/zynq Xilinx
29342
"Expo Review and Upcoming
Global Semiconductor Alliance
45040
Hagai Arbel, CEO
Sanjay Gangal interviews Hagai Arbel, CEO of Vtool at 2015 DAC Conference. Vtool
38590
Accelerating DSP Design
Designers tasked with delivering more capability and performance in today's sophisticated DSP applications are increasingly turning to programmable logic for their hardware solutions. Xilinx® 7 series FPGAs meet this demand with a family of devices uniquely developed to address specific market needs including high performance, low cost, and low power. Xilinx 7 series DSP design platforms accelerate development of DSP applications by reducing schedule risk, enabling design reuse, and introducing new high-level design methodologies. For additional video and instructor-led trainings please visit: www.xilinx.com/training

Check out the White Paper
http://www.xilinx.com/support/documentation/white_papers/wp406-DSP-Design-Productivity.pdf

Visit the Xilinx DSP landing page:
http://www.xilinx.com/products/technology/dsp/index.htm
Xilinx
44749
Steve Bailey, Marketing
Sanjay Gangal interviews Steve Bailey, Marketing Director DVT of Mentor Graphics at 2015 DVCon. Mentor Graphics
43932
Robert Hoogenstryd, Sr.
Interview with Robert Hoogenstryd, Sr. Director of Marketing at Synopsys at 2014 Design Automation Conference. Synopsys
45050
Shubhankar Basu, Sr Product
Sanjay Gangal interviews Shubhankar Basu, Sr Product Manager of Global Foundries at 2015 DAC Conference. GLOBALFOUNDRIES
40443
Rambus Inventor Profile
Christophe Chevallier, Vice President of Product Development, discusses Rambus innovations in new non-volatile memory technologies to help address the demands of both data centers and mobile consumers. Rambus
27150
Automated Low Volume
Advanced Assembly
43925
David Halliday, CEO
Interview with David Halliday, CEO of Silvaco at 2014 Design Automation Conference. Silvaco
44646
Ernest Muhigana, Sr.
Sanjay Gangal interviews Ernest Muhigana, Sr. Product Marketing Manager from Vitesse Semiconductor at 2015 DesignCon. Vitesse Semiconductor
40897
Analyzing Device Resource
Design resource measurements are becoming more complex as device complexity grows. Learn which device resources are important to monitor and how to analyze the utilization report. For More Vivado Tutorials please visit: www.xilinx.com/training/vivado Xilinx
43174
Lawrence Romine
Interview with Lawrence Romine, Senior Manager at Altium Altium
41414
Standup Comedian - Robert
Robert Aitken tells a joke at the ITC Conference ARM
43904
Jay Yantchev, CEO
Interview with Jay Yantchev, CEO at ASTC/VLAB Works at 2014 Design Automation Conference. ASTC/VLAB Works
40777
Breaking the RF Carrier
Simulating nonlinear responses to hundreds of RF carriers is now practical with an innovative simulation technique. Simulating hundreds of RF carriers will be demonstrated in a typical RF architecture. Locating the source of the distortion will also be demonstrated. Traditionally, industries using a large number of RF carriers, like TV, use simplified equations to predict non‐linear performance generally limited to in‐band interference only. This new technique is fast and covers both in‐band and out‐of‐band distortion simulation. Agilent EESof
31533
"ESL: Where We Are",
OSCI
43227
Sherry Hess, V.P.
Interview with Sherry Hess, V.P. of Marketing at AWR AWR
43906
John Pierce, Director
Interview with John Pierce, Director, Product Marketing at Cadence at 2014 Design Automation Conference. Cadence
39011
Software Component Concept
ARM
44270
Stephen Pateras, Product
Sanjay Gangal interviews Stephen Pateras, Product Marketing Director at Mentor Graphics at the 2014 International Test Conference (ITC) Mentor Graphics
41061
Multiphysics Approach
This webinar will show how the CST STUDIO SUITE® Complete Technology approach can be used to aid the full design path of a device. Various physical aspects are important during a development cycle and EM simulation is only one part of it.

The device under test is a microwave oven, specifically the RF generating magnetron and the cooking cavity. The analysis begins with the interaction region of the magnetron, where the resonance condition, particle movement and output power are of interest. The latter directly defines the efficiency of the magnetron, or in other words, the Ohmic losses to the device. The resulting changes in the structure's temperature distribution can lead to structural deformations. In addition the electromagnetic fields within the cooking cavity as well as the fields emitted are discussed.
Since the design is complex, a user friendly simulation tool simplifies the process. We will show how the multiphysics approach can be set up fully parametrically, and how the usage of High Performance Computing (HPC) options can speed-up the simulation.
Finally, a simulation tool has to be reliable if it is to be cost efficient and to replace prototyping. To prove its reliability, comparisons between measurement and simulation for the different steps will be shown.
CST
43933
Rob Dekker, CTO & Founder
Interview with Rob Dekker, CTO and Founder of Verific Design Automation at 2014 Design Automation Conference. Verific Design Automation
39781
ARM® Mali™ SeeMore
Stacy Smith, Senior Developer on the Mali Demo Team, presents ARM's latest demo, SeeMore, running on an Insignal Arndale Development Board (Samsung Exynos 5 Dual -- quad-core ARM Mali-T604 GPU and dual-core ARM Cortex®-A15 processor). Features include:
Bounce lighting and global illumination with Geomerics Enlighten™ Engine
Bullet Physics objects
OpenGL® ES 3.0 functionality
Dynamic animation effects
ETC2 textures
ARM
34424
"10X Better Performance
Real Intent, Inc.
44272
Yervant Zorian, Chief
Sanjay Gangal interviews Yervant Zorian, Chief Architect and Fellow at Synopsys at the 2014 International Test Conference (ITC). Synopsys
43912
Sribash Dey, Executive VP
Interview with Sribash Dey, Executive VP of eInfoChips at the 2014 Design Automation Conference. eInfoChips
45410
Glenn Faris, VP Marketing
Sanjay Gangal interviews Glenn Faris, VP Marketing of Universal Instruments at 2016 IPC/APEX Expo. Universal Instruments
45410
Glenn Faris, VP Marketing
Sanjay Gangal interviews Glenn Faris, VP Marketing of Universal Instruments at 2016 IPC/APEX Expo. Universal Instruments
45523
Isabelle Geday, CEO
Sanjay Gangal interviews Isabelle Geday, CEO of Magillem at 2016 DAC Magillem
45306
Ken Willis, Director
Sanjay Gangal interviews Ken Willis, Director of Product Engineering of Cadence at DesignCon 2016 Cadence
32085
Why SystemC for Synthesis,
OSCI TLM-2.0 Standard and Synthesis Subset Tutorial
45537
Vigyan Singhal, President
Sanjay Gangal interviews Vigyan Singhal, President & CEO of Oski Technology at 2016 DAC. Oski Technology
43461
Ghislain Kaiser, President
Interview with Ghislain Kaiser, President & CEO of Docea Power DOCEA Power
45065
Greg Lebsack, President
Sanjay Gangal interviews Greg Lebsack, President of Tanner EDA at 2015 DAC Conference. Tanner EDA
30554
Utilizing Relational
EMA Design Automation
43923
Joao Marques, Group Manager
Interview with Joao Marques, Group Manager Portugal at S3 Group at 2014 Design Automation Conference. S3 Group
44238
Steven Martin, Sales
Sanjay Gangal interviews Steven Martin, Sales and Marketing at Atollic at 2014 ARM TechCon. Atollic
39784
CDNLive EMEA 2013 Keynote:
Rudi de Winter, Chief Executive Officer of X-FAB, gives his keynote on 'Achieving First-Time-Right in Analog Designs for Today's Demanding Applications' at CDNLive EMEA 2013 in Munich, Germany. For more information on the event please visit: http://www.cadence.com/cdnlive/eu/2013/pages/default.aspx X-Fab
44233
Pankaj Rohatgi, Technical
Interview Pankaj Rohatgi, Technical Director of Engineer at Rambus at 2014 ARM TechCon Rambus
43147
Dave Kohlmeier
Interview with Dave Kohlmeier, Senior Product Line Director at Mentor Graphics Mentor Graphics
40779
Accurate Modeling of
An important step in high frequency / high speed IC design is the characterization of IC performance within a realistic environment including packaging, interconnects, connectors, etc. There are several approaches to creating accurate models of these elements, such as creating equivalent circuit models, EM simulations, and measurements. This webcast will compare these different methods and examine the trade-offs of each. Several case studies are presented that compare measured and simulated results. Agilent EESof
40892
Using the Xilinx Power
Power and cooling specifications for All Programmable SoC and FPGA designs have to be determined early in the product's design cycle, often even before the logic within the All Programmable SoC or FPGA has been designed. An accurate worst-case power analysis early on helps users avoid the pitfalls of overdesigning or under designing the power or cooling system. The Xilinx Power Estimator (XPE) is a spreadsheet based tool that helps users achieve this. For More Vivado Tutorials please visit: www.xilinx.com/training/vivado

Download the Xilinx Power Estimator: http://www.xilinx.com/products/design_tools/logic_design/xpe.htm
Xilinx
34416
"Excellence in Marketing
Highpointe
29357
"Industry Forecast for
Semico Research
39003
New features in ARM DS-5
This 5 minute tour introduces the new features in ARM DS-5 version 5.14 including ARM big.LITTLE processing support, improved compiler, multi-core debugger and trace synchronization, power and temperature monitoring and much more... ARM
43929
Tom Borgstrom, Director
Interview with Tom Borgstrom, Director of Marketing at Synopsys at 2014 Design Automation Conference. Synopsys
44230
Mike Skrtic Partnership,
Interview with Mike Skrtic, Partnership Marketing Manager at Segger at 2014 ARM TechCon Segger
44407
Sean Young/Jamie Sirois,
Jeff Rowe interviews Sean Young, AEC Segment Manager and Jamie Sirois, Prod Development of Hewlett-Packard at 2014 Autodesk University. Hewlett-Packard
30902
RTL Block Verification
Jasper Design Automation
42806
CES 2014: Keynote Address
Intel CEO Brian Krzanich discusses wearable technology, the journey towards conflict-free processors, in-car infotainment and Intel Security at CES 2014 in Las Vegas. Intel
45386
David Parry, COO
Sanjay Gangal interviews David Parry, COO of Oski Tehnology at 2016 DVCon. Oski Technology
44754
Mike Bartley CEO HW-SW
Sanjay Gangal interviews Mike Bartley, CEO HW-SW verif leaders TVS - Test and Verification at 2015 DVCon. TVS - Test and Verification
45310
Leonardo Sassi, Principal
Sanjay Gangal interviews Leonardo Sassi, Principal Engineer of CST at DesignCon 2016. CST
45401
Simon Fried, Chief Business
Sanjay Gangal interviews Simon Fried, Chief Business Officer of Nano Dimension at 2016 IPC/APEX Expo. Nano Dimension
29360
"High-Speed Data IP",
S3 Group
27151
On-time Delivery and Quality
Advanced Assembly
31195
Kathryn Kranen on Jasper
Jasper Design Automation
39166
DVCon 2013 Panel "Where
In the world of SOC design, there are multiple levels of abstraction that a design moves through as it reaches the back-end of gate-level implementation. It is common these days for the process to begin with a spec for simulation and architectural exploration. In a sense, verification precedes design. The outcome of that first step is an initial design RTL model. The process then goes through numerous and complex design refinements leading to the final gate-level model. Coincident with the design refinements, the verification flow applies assertions, testbenches, timing constraints and automation methods to those devolving designs. Much as we try to separate them, design and verification are joined at the hip. Or, are they?

Moderator: Brian Hunter - Cavium, Inc.

Panelists:
Pranav Ashar - Real Intent, Inc.
John Goodenough - ARM, Inc.
Harry Foster - Mentor Graphics Corp.
Oren Katzir - Intel Corp.
Gary Smith - Gary Smith EDA
Real Intent, Inc.
43928
Mick Posner, Director
Interview with Mick Posner, Director of Product Marketing at Synopsys at 2014 Design Automation Conference. Synopsys
45071
Gopa Periyadan, COO
Sanjay Gangal interviews Gopa Periyadan, COO of Mobiveil Inc at 2015 DAC Conference. Mobiveil
45243
Rupert Baines, CEO
Sanjay Gangal interviews with Rupert Baines, CEO of UltraSoC at 2015 ARM Tech Con. UltraSoC
44635
Joe Clark, Founder
Sanjay Gangal interviews Joe Clark, Founder of DownStream Technologies at 2015 DesignCon DownStream Technologies
45249
Jason Polychronopoulos,
Sanjay Gangal interviews Jason Polychronopoulos, Product Manager of Mentor Graphics at 2015 ARM Tech Con. Mentor Graphics
31835
Matt Hsu on Jasper Formal
Jasper Design Automation
39467
Simon Segars - Incoming
Simon Segars of ARM on the value of Ecosystems with reference to a book by James F. Moore, 'Shared Purpose: A Thousand Business Ecosystems, a Worldwide Connected Community, and the Future' The book is free to download here:
http://www.arm.com/files/pdf/Shared_Purpose.pdf
ARM
45039
Neel Desai, Product Marketing
Sanjay Gangal interviews Neel Desai, Product Marketing Manager of Synopsys at 2015 DAC Conference. Synopsys
40776
How to Make Your Existing
A successful design is not just a design that meets its specifications. When manufactured, especially in big quantities, variation in its components or in the manufacturing process parameters can result in costly failures. This paper will present a unique design methodology that would turn any standard design into a robust first pass success design with high performance and RF yield. The methodology offers a way for designers to quickly and easily make their existing designs more robust and insensitive to process variation. It incorporates two powerful tools — Yield Sensitivity Histograms (YSH) and Design of Experiments (DOE)—both of which can be used to identify exact problem areas in a design, fix them, and thus produce designs that are immune to process variations. As a result, the designs will also become less sensitive to other external factors such as changes in temperature and supply voltage, and effects of packages and bond wires. Applying these techniques will improve designs performance and reliability, thus allowing manufacturing them with full confidence in meeting first pass success with high performance and yield. Agilent EESof
43511
Satish Bagalkotkar, President
Interview with Satish Bagalkotkar, President & CEO of Synapse Synapse
45387
Uri Tal, CEO
Sanjay Gangal interviews Uri Tal, CEO of Rocketick at 2016 DVCon. Rocketick
40574
Genesys Overview
In this video we show Agilent Genesys, the affordable, accurate and easy-to-use RF design and simulation tool created for RF circuit board and sub-system designers.

For more information about Agilent Genesys visit:
http://www.agilent.com/find/eesof-genesys
Agilent EESof
27152
Kinds of Services
Advanced Assembly
44757
Tom Anderson discusses
Tom Anderson, Vice President of Marketing at Breker Verification Systems, shares his positive experience at DVCon 2015 in San Jose. He discusses how applications (“apps”) are transforming the EDA market and describes the success of Breker’s Cache Coherency TrekApp. Breker Verification
43814
ARM and IBM: IoT demo
At IBM IMPACT 2014, ARM and IBM teamed up to create an IoT technology demonstration of ARM Sensinode and MQTT enabled smart street lights that are controlled through the IBM Intelligent Operations Center (IOC). The demo illustrates viability in expanding IBM IOC connectivity through ARM's Sensinode technology as well as through MQTT integration. IBM Informix database technology was utilized to help provide the connectivity "glue" to the IBM IOC. ARM
43921
Jin Zhang, Sr. Director
Interview with Jin Zhang, Sr. Director of Marketing at Oski Techology at 2014 Design Automation Conference. Oski Technology
43900
Dean Drako, CEO
Interview with Dean Drako, CEO at IC Manage at 2014 Design Automation Conference. IC Manage
26103
CDNLive! Benefits
Cadence
44228
Tom De Schutter, Product
Sanjay Gangal interviews Tom De Schutter, Product Marketing Manager at Synopsys at 2014 ARM TechCon. Synopsys
30906
RTL Development
Jasper Design Automation
42393
Riviera-PRO™ Overview:
Riviera-PRO™ addresses verification needs of engineers crafting tomorrow's cutting-edge FPGA and SoC devices. Riviera-PRO enables the ultimate testbench productivity, reusability, and automation by combining the high-performance simulation engine, advanced debugging capabilities at different levels of abstraction, and support for the latest Language and Verification Library Standards. Aldec
30909
Post-silicon Verification
Jasper Design Automation
44752
"New Ascent Lint with
Sanjay Gangal interviews Graham Bell, VP of Marketing of Real Intent, Inc at 2015 DVCon about the new release of the Ascent Lint product with DO-254 support, breakthroughs in speed and capacity, and upcoming events. Real Intent, Inc.
45315
Stephen Slater, Product
Sanjay Gangal interviews Stephen Slater, Product Manager of Keysight Technologies at DesignCon 2016. Keysight Technologies
41224
Xilinx and ARM Address
Ian Ferguson, VP of Segment Marketing at ARM, explains how an ARM processor combined with an FPGA addresses the embedded space. He also discusses three areas where programmable logic provides the most value along with the new markets addressed by the Zynq-7000 All Programmable device. Xilinx
41832
HES™ Overview - A Hybrid
Aldec Hardware Emulation Solutions is a hybrid verification and validation ecosystem for hardware and software teams developing the latest SoC and ASIC designs. Partnering the latest high-capacity FPGA technology with industry leading co-emulation standards, HES allows for multiple modes of verification and validation including bit-level simulation acceleration, transaction-level emulation, Hardware prototyping, and Virtual Modeling. Aldec
44638
Michael Sporer, Director
Sanjay Gangal interviews Michael Sporer, Director of IC Marketing from Mosys at 2015 DesignCon. Mosys
45055
New Meridian Physical
Sanjay Gangal interviews Graham Bell, VP of Marketing of Real Intent at 2015 DAC Conference. Real Intent, Inc.
30905
Architectural Verification
Jasper Design Automation
32968
HiPer Silicon Full Flow Demo
Tanner EDA website
45222
CL Lou, CEO
Sanjay Gangal interviews CL Lou, CEO of STAr at 2015 ITC. STAr Technologies
44411
Tom Salomone, Segment Mgr
Jeff Rowe interviews Tom Salomone, Segment Manager of Lenovo at 2014 Autodesk University. Lenovo
39163
DVCon 2013 Panel "Where
In the world of SOC design, there are multiple levels of abstraction that a design moves through as it reaches the back-end of gate-level implementation. It is common these days for the process to begin with a spec for simulation and architectural exploration. In a sense, verification precedes design. The outcome of that first step is an initial design RTL model. The process then goes through numerous and complex design refinements leading to the final gate-level model. Coincident with the design refinements, the verification flow applies assertions, testbenches, timing constraints and automation methods to those devolving designs. Much as we try to separate them, design and verification are joined at the hip. Or, are they?

Moderator: Brian Hunter - Cavium, Inc.

Panelists:
Pranav Ashar - Real Intent, Inc.
John Goodenough - ARM, Inc.
Harry Foster - Mentor Graphics Corp.
Oren Katzir - Intel Corp.
Gary Smith - Gary Smith EDA
Real Intent, Inc.
43873
Pete Hansen, VP Sales
Interview with Pete Hansen, VP Sales at MunEDA MunEDA
43635
Phil Crabb
Interview with Phil Crabb, European Technical Sales Manager at eXception PCB Solutions eXception PCB Solutions
45070
Amit Gupta, CEO
Sanjay Gangal interviews Amit Gupta, CEO of Solido Design Automation at 2015 DAC Conference. Solido Design Automation
45032
Ridha Hamza, VP of Sales
Sanjay Gangal interviews Ridha Hamza, VP of Sales and Marketing at Docea Power at 2015 DAC Conference. DOCEA Power
44235
Stefan Skarin, CEO and
Sanjay Gangal interviews Stefan Skarin, CEO and President at IAR Systems at 2014 ARM TechCon. IAR Systems
44269
Mike Vachon, Group Director
Sanjay Gangal interviews Mike Vachon, Group Director at Candence at the 2014 International Test Conference (ITC) Cadence
39785
CDNLive EMEA 2013 Keynote:
Rudi de Winter, Chief Executive Officer of X-FAB, gives his keynote on 'Achieving First-Time-Right in Analog Designs for Today's Demanding Applications' at CDNLive EMEA 2013 in Munich, Germany. For more information on the event please visit: http://www.cadence.com/cdnlive/eu/2013/pages/default.aspx X-Fab
41415
Standup Comedy Routine
A standup comedian (wannabe) tells a joke at the ITC Conference EDACafe.Com
30907
Design and IP Leverage
Jasper Design Automation
34385
"Technical Program, New
DVCon 2011
39012
MDK-ARM Version 5 Overview
ARM
43937
EDACafe Joke Reel
A few standup comedians at the 2014 Design Automation Conference. EDACafe.com
45320
Casey Morrison, Systems
Sanjay Gangal interviews Casey Morrison, Systems Applications Manager of Texas Instruments at DesignCon 2016. Texas Instruments
30908
SoC Integration
Jasper Design Automation
43606
Using Hardware Co Simulation
Learn how to use Point-to-Point Ethernet Hardware Co-Simulation with Vivado System Generator for DSP. System Generator provides hardware co-simulation, making it possible to incorporate a design running in an FPGA directly into a Simulink simulation. "Hardware Co-Simulation" compilation targets automatically create a bitstream and associate it to a block. For More Vivado Tutorials please visit: http://www.xilinx.com/training/vivado Xilinx
44232
Graham Bell, VP of Marketing
Sanjay Gangal interviews Graham Bell, VP of Marketing at Real Intent at 2014 ARM TechCon Real Intent, Inc.
45311
Joe Clark, Co-Founder
Sanjay Gangal interviews Joe Clark, Co-Founder of DownStream Technologies at DesignCon 2016. DownStream Technologies
43902
Ben Jordan, Product Marketing
Interview with Ben Jordan, Product Marketing Manager at Altium at 2014 Design Automation Conference. Altium
43913
Warren Savage, CEO
Interview with Warren Savage, CEO of IPextreme at the 2014 Design Automation Conference. IPextreme
41213
Tandem Configuration
Tandem Configuration is a technology that has been designed to improve FPGA configuration times when using Xilinx PCI Express IP. In this video, you will learn why this technology has been developed, and the specific goals and capabilities for each variant of the solution. You will also learn what is unique about the Tandem IP, view a walk through of IP generation and some results based on a reference design.

For More Vivado Tutorials please visit: www.xilinx.com/training/vivado
Xilinx
43182
Edmund Garstkiewicz
Interview with Edmund Garstkiewicz, Market & Applications Manager at Harting Inc. of North America Harting
40528
Chip/Package/Board: Constraint
Memory interfaces have single-ended data rates in the 1GHz-plus range and serial links are running upwards of 10 gigabits per second. A precise analysis of each of these signals is required at silicon, package and board level. The design and optimization performed on each one of these interconnection levels must be done in a global context.
This webinar proposes a global methodology which combines three dimensional (3D) electromagnetic (EM) analysis for PCB and package with chip power switching macro-modeling.

Difference between segmentation approach (where silicon, package and PCB are analyzed separately and then combined with standard cascading technique) and integrated/global approach (where chip, package and PCB are analyzed as single entity in a co-simulation mode) are discussed and based on the results, guidelines are outlined.
CST
45054
Jin Zhang, VP of Marketing
Sanjay Gangal interviews Dr. Jin Zhang, VP of Marketing and Customer Relations at Oski Technology at 2015 DAC Conference. Oski Technology
45248
Cheng Wang, VP Engineering
Sanjay Gangal interviews Cheng Wang, VP Engineering of Flex Logix at 2015 ARM Tech Con. Flex Logix
44636
Rich Pangier, Sr. Director
Sanjay Gangal interviews Rich Pangier, Sr. Director of OEM Marketing from Isola Group at 2015 DesignCon. Isola Group
45009
Chouki Aktouf, Founder & CEO
Sanjay Gangal interviews Chouki Aktouf, Founder & CEO of Defacto Technologies Defacto Tech
44334
Eric Rogge, Global Marketing
Jeff Rowe interviews Eric Rogge (Global Marketing Director, Hi-Tech Industry) and Michael Munsey (Director Product Management and Strategy) at Dassault Systemes. Dassault Systèmes America
45390
"New Verification Apps,
Sanjay Gangal interviews Graham Bell, VP of Marketing of Real Intent, Inc. at 2016 DVCon. Real Intent, Inc.
45026
Chris Higgs, Head of
Sanjay Gangal interviews Chris Higgs, Head of Hardware of Potential Ventures (Partner with Aldec); Satyam Jani, Software Prod Mgr of Aldec; and Krzysztof Szczur, Tech Support Manager of Aldec at 2015 DAC Conference. Aldec
43185
Thomas Tarter, President
Interview with Thomas Tarter, President of Package Science Serices Package Science Serices
43604
EMC & EMI analysis of
One challenging aspect of PCB design is to minimize the effects of electromagnetic interference (EMI) and to ensure electromagnetic compatibility (EMC). EMPro allows you to simulate the electromagnetic emissions from your PCB at different frequencies, as well as simulate the susceptibility of your design to outside sources of EM emissions. You can even analyze the impact of placing your PCB design inside different metal enclosures.

This video illustrates the use of full 3D FDTD EM simulation technology in EMPro to analyze EMI and EMC of a PCB inside a metal chassis.

For more information: http://www.agilent.com/find/eesof-empro
For a free evaluation copy of EMPro: http://www.agilent.com/find/eesof-empro-info
Agilent EESof
43176
Colin Warwick
Interview with Colin Warwick, Product Manager at Agilent Agilent EESof
39165
DVCon 2013 Panel "Where
In the world of SOC design, there are multiple levels of abstraction that a design moves through as it reaches the back-end of gate-level implementation. It is common these days for the process to begin with a spec for simulation and architectural exploration. In a sense, verification precedes design. The outcome of that first step is an initial design RTL model. The process then goes through numerous and complex design refinements leading to the final gate-level model. Coincident with the design refinements, the verification flow applies assertions, testbenches, timing constraints and automation methods to those devolving designs. Much as we try to separate them, design and verification are joined at the hip. Or, are they?

Moderator: Brian Hunter - Cavium, Inc.

Panelists:
Pranav Ashar - Real Intent, Inc.
John Goodenough - ARM, Inc.
Harry Foster - Mentor Graphics Corp.
Oren Katzir - Intel Corp.
Gary Smith - Gary Smith EDA
Real Intent, Inc.
43926
Randy Smith, VP Marketing
Interview with Randy Smith, VP Marketing of Sonics at 2014 Design Automation Conference. Sonics
44633
Brad Brim, Sr. Staff
Sanjay Gangal interviews Brad Brim, Sr. Staff Product Engineer at Cadence at 2015 DesignCon. Cadence
45409
Peter van den Eijnden,
Sanjay Gangal interviews Peter van den Eijnden, Managing Director of JTAG Technologies at 2016 IPC/APEX Expo. JTAG Technologies
42766
How to Debug a Linux
Learn how to debug a Linux application using the system debugger from the Xilinx SDK. For More Zynq Tutorials please visit: http://www.xilinx.com/training/zynq Xilinx
45411
Barbara Pauls, President / CEO
Sanjay Gangal interviews Barbara Pauls, President / CEO of Mid America Taping and Reeling at 2016 IPC/APEX Expo. Mid America Taping and Reeling
44911
GSA Panel: IP Integration
GSA Global
45319
Adrian Mejia, EMC Sales
Sanjay Gangan interviews Adrian Mejia, EMC Sales Engineer of TechDream for Quadcept at DesignCon 2016. TechDream Quadcept
42068
EDA Playground Introduction
Introduction to the EDA Playground web app, covering some of the basic features such as editing, running simulations, viewing waves, and sharing your Verilog code.

EDA Playground homepage: http://www.edaplayground.com/home

Recommend viewing in 720p quality or higher.
Victor EDA
44268
Kiran Vittal, Sr. Director
Sanjay Gangal interviews Kiran Vittal, Sr. Director of Product Marketing at Atrenta at the 2014 International Test Conference (ITC) Atrenta
44640
Frank Ferro, Sr. Director
Sanjay Gangal interviews Frank Ferro, Sr. Director Product Management from Rambus at 2015 DesignCon. Rambus
41067
Chopper Stabilized Amplifier
Chopper stabilized amplifier is designed and simulated in ViaDesigner software. The design example shows how to model amplifier input offset voltage errors and how to create error cancelling circuits. The chopper approach samples the error voltage and then removes (minimizes) the error from the input measurement. Triad Semiconductor
45542
Mark Gilbert, President
Sanjay Gangal interviews Mark Gilbert, President of EDA Careers at 2016 DAC. EDA Careers
30556
Enhanced Design Reuse,
EMA Design Automation
45062
Ron DiGiuseppe, Sr. Marketing
Sanjay Gangal interviews Ron DiGiuseppe, Sr. Marketing Manager of Synopsys at 2015 DAC Conference. Synopsys
45534
Rob Rudder, Vice President
Sanjay Gangal interviews Rob Rudder, Vice President of Siemens at 2016 DAC. Siemens
44746
Cristian Amitroaie Talks
After an overview of AMIQ EDA and its products – DVT Eclipse IDE for SystemVerilog, Verilog, e language, and VHDL, Verissimo SystemVerilog Testbench Linter, Specador Documentation Generator, and the newly launched DVT Debugger Add-on Module, Amitroaie explains how users can benefit from the integration between the DVT IDE and the DVT Debugger. The debugger works with all major simulators and provides advanced debugging capabilities, which in combination with the powerful code navigation and inspection features of the DVT IDE, eliminates the need to switch continuously between a code editor and simulator and enable users to debug their code more efficiently. AMIQ
39164
DVCon 2013 Panel "Where
In the world of SOC design, there are multiple levels of abstraction that a design moves through as it reaches the back-end of gate-level implementation. It is common these days for the process to begin with a spec for simulation and architectural exploration. In a sense, verification precedes design. The outcome of that first step is an initial design RTL model. The process then goes through numerous and complex design refinements leading to the final gate-level model. Coincident with the design refinements, the verification flow applies assertions, testbenches, timing constraints and automation methods to those devolving designs. Much as we try to separate them, design and verification are joined at the hip. Or, are they?

Moderator: Brian Hunter - Cavium, Inc.

Panelists:
Pranav Ashar - Real Intent, Inc.
John Goodenough - ARM, Inc.
Harry Foster - Mentor Graphics Corp.
Oren Katzir - Intel Corp.
Gary Smith - Gary Smith EDA
Real Intent, Inc.
45030
Neil Hand, VP of Marketing
Sanjay Gangal interviews Neil Hand, VP of Marketing of Codasip at 2015 DAC Conference. Codasip
43934
Tom Feist, Sr. Marketing
Interview with Tom Feist, Sr. Marketing Director at Xilinx at 2014 Design Automation Conference. Xilinx
44227
John Swanson, Product
Interview with John Swanson, Product Marketing Mgr at Synopsys at 2014 ARM TechCon. Synopsys
45221
Dr. Yervant Zorian, Fellow
Sanjay Gangal interviews Dr. Yervant Zorian, Fellow & Chief Architect of Synopsys at 2015 ITC Synopsys
45536
"BIG Data CDC Sign-off;
Sanjay Gangal interviews Graham Bell, VP Marketing of Real Intent at 2016 DAC. Real Intent, Inc.
45399
Stephan Schmidt, President
Sanjay Gangal interviews Stephan Schmidt, President of LPKF Laser & Electronics at 2016 IPC/APEX Conference. LPKF Laser & Electronics
45052
Stephen Crosher, Managing
Sanjay Gangal interviews Stephen Crosher, Managing Director of Moortec at 2015 DAC Conference. Moortec
44243
Jeff Scott, Principal
Sanjay Gangal interviews Jeff Scott, Principal ARM SoC Architect at Open-Silicon at 2014 ARM TechCon. Open-Silicon, Inc.
40691
Automotive PCBs: Efficient
The increasing demand of in-vehicles infotainment systems, along with active safety and electronic multimedia systems, makes simulation of growing importance in the automotive industry. Building a reliable system, shortening the development cycle and reducing the cost are important factors and the use of simulation tools and virtual prototyping are indispensable to achieve these goals.

This webinar presents efficient workflows for signal integrity (SI) and power integrity analysis (PI): the pre-layout is addressed using CST DESIGN STUDIO, and for post layout (both SI and PI) analysis, CST PCB STUDIO® will be employed.

Several test models are discussed and guidelines on how to improve existing designs and how to build an optimized system are presented.
CST
45241
Mats Ullstrom, COO
Sanjay Gangal interviews Mats Ullstrom, COO of IAR Systems at 2015 ARM Tech Conference. IAR Systems
45057
Ravi Mehta, Co-Founder
Sanjay Gangal interviews Ravi Mehta, Co-Founder and VP IP of SILABTECH at 2015 DAC Conference. SILABTECH Pvt Ltd
45037
Mark Wevers, Product
Sanjay Gangal interviews Mark Wevers, Product Manager and Rod Simon, Account Executive of OpenText at 2015 DAC Conference. Open Text
45027
Cliff Wiener, Founder/CEO
Sanjay Gangal interviews Cliff Wiener, Founder/CEO of Analog Rails at 2015 DAC Conference. Analog Rails
45058
Dr. Vojin Oklodbzija,
Sanjay Gangal interviews Dr. Vojin Oklodbzija, President & CTO of Silicon Analytics at 2015 DAC Conference. Silicon Analytics
44637
Colin Warwick, Product Manager
Sanjay Gangal interviews Colin Warwick, Product Manager from Keysight Technologies at 2015 DesignCon. Keysight Technologies
43909
Mark Gilbert, President
Interview with Mark Gilbert, President of EDA Careers at the 2014 Design Automation Conference. EDA Careers
153419
Steve Stratz, VP
Sanjay Gangal interviews Steve Stratz, VP of ASIC North at 2016 ARM TechCon Conference. ASIC North
44729
John Van NewKirk, President
Sanjay Gangal interviews John Van NewKirk, President & CEO from CheckSum at 2015 IPC/Apex Expo. CheckSum
45539
Roland Jancke, Head of
Sanjay Gangal interviews Roland Jancke Head of Department of Fraunhofer IIS at 2016 DAC. Fraunhofer IIS
39552
"Real Intent News: Record
Prakash Narain, President and CEO of Real Intent, speaks with Graham Bell about the accomplishments in the first half of fiscal 2013 ending on April 30. He points out that 90% of 2012 bookings has already been received, revenue will double in 2013, an expanded world-wide sales channel, new partner flows with Calypto Design Systems and DeFacTo Technologies, and a preview of what to expect at DAC 2013 in Austin: Ascent and Meridian products with best-in-class speed, capacity and lowest-noise reporting, and a photo-booth! Real Intent, Inc.
43187
Brad Griffin
Interview with Brad Griffin, Product Marketing Director at Cadence Cadence
45046
Dinesh Bettadapur, VP
Sanjay Gangal interviews Dinesh Bettadapur, VP Business Development of Coventor at 2015 DAC Conference. Coventor
40780
A Model Based Approach
This webcast introduces a unique system/circuit verification flow that leverages the nonlinear behavioral models with memory effects using GoldenGate's fast circuit envelope simulation solution for system-level verification with SystemVue. Agilent EESof
44200
Interview with Toshio
Interview with Toshio Nakama, CEO of S2C S2C
44644
Nathan Tracy, Manager
Sanjay Gangal interviews Nathan Tracy, Manager of Industry Standards from TE Connectivity at 2015 DesignCon. TE Connectivity
45053
Simon Davidmann, CEO
Sanjay Gangal interviews Simon Davidmann, CEO of Imperas Software at 2015 DAC Conference. Imperas Software
45404
David Reyes, USA Sales Manager
Sanjay Gangal interviews David Reyes, USA Sales Manager of JBC Tools at 2016 IPC/APEX Expo. JBC Tools
43920
Dave Kelf, VP Marketing
Interview with Dave Kelf, VP Marketing at OneSpin Solutions at 2014 Design Automation Conference. OneSpin Solutions
45023
Ivan Petkov - Business
Sanjay Gangal interviews Ivan Petkov - Business Development Manager of Allegro DVT at 2015 DAC Conference. Allegro DVT
43916
Mark Olen, Marketing Director
Interview with Mark Olen, Marketing Director at Mentor Graphics at 2014 Design Automation Conference. Mentor Graphics
45115
IMS2015 MicroApps - Enhanced
Load pull characterization, which is of course a method of applying impedances to an RF device and measuring its performance, has been used for decades by high power RF designers. Recent advances in data file formats by load pull measurement system vendors, such as Maury Microwave and Focus Microwaves, have significantly expanded the usefulness of load pull characterization. These new file formats support a sweep of an independent variable, such as input power, DC bias, or temperature, in addition to the swept source or load impedances.

In this presentation, we show how new load pull file formats are integrated into Microwave Office and do so by illustrating an example design flow of a 2.1 GHz LDMOS power amplifier utilizing measured load pull data.

Prsented by: Chris Bean, Solutions Architect, AWR Group, NI
AWR
31363
Configuration, Control
OSCI
44755
Rob Dekker, CTO
Sanjay Gangal interviews Rob Dekker, CTO of Verific at 2015 DVCon. Verific
45530
Andy Potemski, Group
Sanjay Gangal interviews Andy Potemski, Group Director, Lynx Design Systems of Synopsys at 2016 DAC. Synopsys
45041
Peer Schmitt, Co-Founder
Sanjay Gangal interviews Peer Schmitt, Co-Founder of Adicsys at 2015 DAC Conference. Adicsys
40773
Applying the Latest Technologies
In this webcast we use an LTE RF power amplifier application to present the latest developments in design and simulation technologies. We will cover many technologies that improve MMIC design: X-parameters*, circuit/3D EM simulation, improved optimization and power amplifier load pull techniques, design for manufacturing, foundry PDKs for physical design, desktop DRC and LVS, and integration of Cadence and Mentor DRC and LVS tools. Agilent EESof
45407
Michael Ford, Sr. Marketing
Sanjay Gangal interviews Michael Ford, Sr. Marketing Development Mgr. of Mentor Graphics at 2016 IPC/APEX Expo. Mentor Graphics
40708
An Awfully Funny Joke
An Awfully Funny Joke by Graham Bell at the 2013 DAC in Austin. Real Intent, Inc.
45388
Daniel Hansson, CEO
Sanjay Gangal interviews Daniel Hansson, CEO of Verifyter at 2016 DVCon. Verifyter
40706
Stand up comedian Mark Gilbert
Stand up comedian Mark Gilbert at the 2013 DAC in Austin. EDA Careers
45307
Sanjay Gangal interviews Brian Vicich, VP Engineering and CTO of Samtec, Inc. at DesignCon 2016. Samtec, Inc.
40702
Standup Comedian - Jennifer
Standup Comedian - Jennifer shares a joke at DAC 2013 EDACafe.Com
45379
Tom Anderson, VP. Marketing
Sanjay Gangal interviews Tom Anderson, VP of Marketing of Breker Verification Systems at 2016 DVCon. Breker Verification
41809
Peter Lefkin
Interview with Peter Lefkin, Managing Director of MIPI Alliance MIPI Alliance
153447
Stephen Douglas, Solutions
Sanjay Gangal interviews Stephen Douglas, Solutions & Technical Strategy Lead of Spirent at 2016 ARM TechCon Conference. Spirent
45250
Masoud Kamali, Founder & CEO
Sanjay Gangal interviews Masoud Kamali, Founder & CEO of VirtualBeam at 2015 ARM Tech Con. VirtualBeam, Inc
43898
Kirt Kisling, Mktg Prgms Mngr
Interview with Kirt Kisling, Mktg Prgms Mngr at Agilent EEsof EDA at 2014 Design Automation Conference. Agilent EESof
45239
Stephen Martin, VP
Sanjay Gangal interviews with Stephen Martin, VP of Atollic at 2015 ARM Tech Conference. Atollic
45402
Sujatha Ramanujan, COO
Sanjay Gangal interviews Sujatha Ramanujan, COO of Intrinsiq Materials at 2016 IPC/APEX Expo. Intrinsiq Materials
43870
Eric Thune, VP marketing
Interview with Eric Thune, VP marketing at ATopTech at 2014 Design Automation Conference ATopTech
41398
iPhone 5S Teardown Round Up
We've been seeing spoilers of Apple's latest iPhone for months, but that didn't stop the excitement of getting our hands on one. We sent our co-founder to Australia to get it first look at the new iPhone 5s. This is an "S" version, which means its speedier, more secure, superior OR similar to it's predecessor in form and function. Well whatever it stands for, we want to see what's inside! And the teardown begins... iFixIt
43178
Antonio Ciccomancini
Interview with Antonio Ciccomancini, EDA Market Development Manager at CST CST
44560
Virtex UltraScale VU440
See the new Virtex Ultrascale VU440, the world’s largest FPGA, in action being used to prototype 10 ARM® Cortex-A9 CPUs Xilinx
45056
Rob van Blommerstein,
Sanjay Gangal interviews Rob van Blommerstein, VP of Marketing of S2C Inc. at 2015 DAC Conference. S2C
43504
Sunil Sahoo
Interview with Sunil Sahoo, Senior Corporate Applications Engineer at Aldec Aldec
45538
Jean-Marie Brunet, Marketing
Sanjay Gangal interviews Jean-Marie Brunet, Marketing Director of Mentor Graphics at 2016 DAC. Mentor Graphics
43907
Mark Milligan, VP Marketing
Mark Milligan, VP Marketing at Calypto at 2014 Design Automation Conference. Calypto
34412
"C Synthesis Expansion
Forte Design
43924
Floriberto Lima, CEO
Interview with Floriberto Lima, CEO at SiliconGate at 2014 Design Automation Conference. SiliconGate
39066
Putting the ColdFire
Webinar presented by IPextreme on Feb. 28, 2013 IPextreme
44634
Dr. Klaus Krohne, Market
Sanjay Gangal interviews Dr. Klaus Krohne, Market Development Manager from CST AG at 2015 DesignCon. CST
44647
James Church, Solutions
Sanjay Gangal interviews James Church, Solutions Architect from Zuken at 2015 DesignCon. Zuken
45043
Steve Brown, Director
Sanjay Gangal interviews Steve Brown, Director of Marketing of Cadence at 2015 DAC Conference. Cadence
45385
Dave Kelf, VP Marketing
Sanjay Gangal interviews Dave Kelf , VP Marketing of OneSpin Solutions at 2016 DVCon. OneSpin Solutions
45253
Dan Armbrust, CEO and
Sanjay Gangal interviews Dan Armbrust, CEO and Co-Founder of Silicon Catalyst at 2015 ARM Tech Con. Silicon Catalyst
45110
Rich Goldman, Partner
Sanjay Gangal interviews Rich Goldman Partner at Silicon Catalyst during 2015 DAC Conference. Silicon Catalyst
45378
Cristian Amitroaie , CEO
Sanjay Gangal interviews Cristian Amitroaie, CEO of AMIQ at 2016 DVCon. AMIQ
44231
Randy Smith, Vice President
Interview with Randy Smith, Vice President of Marketing at Sonics at 2014 ARM TechCon Sonics
43922
Frank Ferro, Senior Director
Interview with Frank Ferro, Senior Director Product Management of Rambus at the 2014 Design Automation Conference. Rambus
153422
Andrew Girson, CEO
Sanjay Gangal interviews Andrew Girson, CEO of Barr Group at 2016 ARM TechCon Conference. Barr Group
45059
Floriberto Lima, CEO
Sanjay Gangal interviews Floriberto Lima, CEO of SiliconGate at 2015 DAC Conference. SiliconGate
45381
Frank Schirrmeister,
Snajay Gangal interviews Frank Schirrmeister, Sr. Group Director, Product Management of Cadence at 2016 DVCon. Cadence
45400
Phil Kinner, Global Business/Technical
Sanjay Gangal interviews Phil Kinner, Global Business/Technical Director of Electrolube/HK Wentworth at 2016 IPC/APEX Conference. Electrolube/HK Wentworth
43512
Sanjiv Kaul, President & CEO
Interview with Sanjiv Kaul, President & CEO of Calypto Calypto
45297
Symantec, ARM, Progressive
Simon Segars (ARM), Paul Beckwith (Progressive Group of Insurance Companies), Coby Sella (ARM), and Balaji Yelamanchili (Symantec) talk about trust in a connected world, at ARM TechCon 2015. ARM
45024
Dave Kelf, VP of Marketing
Sanjay Gangal interviews Dave Kelf, VP of Marketing of OneSpin Solutions at DAC 2015 Conference. OneSpin Solutions
45035
Jason Xing, CEO
Sanjay Gangal interviews Jason Xing, CEO of ICScape at 2015 DAC Conference. ICScape
45403
Dr. John Mitchell, President
Sanjay Gangal interviews Dr. John Mitchell of IPC Association at 2016 IPC/APEX Expo. IPC Association
45216
Stuart Spencer, Sr. Sales
Sanjay Gangal interviews Stuart Spencer, Sr. Sales Manager of Astronics Test Sys at 2015 ITC Conference. Astronics Test Systems
44561
SDAccel Development Environment
This video demonstrates the SDAccel development environment for acceleration using a standard X86_64 workstation containing an Alpha data ADM-PCIE-7V3 accelerator. Xilinx
45048
Geoff Tate, CEO
Sanjay Gangal interviews Geoff Tate, CEO of Flex Logix at 2015 DAC Conference. Flex Logix
45049
Dirk Friebel, Business
Sanjay Gangal interviews Dirk Friebel, Business Development Manager of Fraunhofer IIS at 2015 DAC Conference. Fraunhofer IIS
44758
Dave Kelf, V.P. of Marketing
Sanjay Gangal interviews Dave Kelf, V.P. of Marketing of OneSpin Solutions at 2015 DVCon. OneSpin Solutions
45382
Mark Olen, Product marketing
Sanjay Gangal interviews Mark Olen, Product marketing Manager of Mentor Graphics at 2016 DVCon. Mentor Graphics
40704
A hilarious joke by Mike
A hilarious joke by Mike Gianfagna at DAC 2013 Atrenta
40434
CAD Research and Education
Guest: Dr. David Z. Pan, Department of Electrical & Computer Engineering, University of Texas at Austin
Host: Karen Bartleson, Director, Community Marketing, Synopsys Inc.

Audio version can be found here: http://bit.ly/17gLjvw
What is behind the advances in technology that we don't always see as employees of EDA, semiconductor, and electronics companies? Research, of course. Universities continue to be a critical constituent in the evolution of our astonishing success. Dr. David Z. Pan tells us about the research his group undertakes in pushing the design-manufacturing envelope as they constantly look forward in technology.

Dr. Pan: "Recently my group has been working quite a lot on pushing 3D-IC manufacturing issues and reliability issues. As we know for the time being, scaling is continuing. We have 14 nm and 10 nm on the horizon but ultimately the horizontal scaling stops and the vertical [must start]."

Dr. Pan talks about:
-What is going on in his research group as they push the design envelope
-3D-IC
-Extreme scaling
-A bio project that one of his PHD students worked on
-Self-assembly
-Nanophotonics
-Whether or not he thinks the next generation is being well prepared to enter the workforce and cary on the always-faster-moving world of technology
Synopsys
43930
Tom De Schutter, Product
Interview with Tom De Schutter, Product Marketing Mgr. at Synopsys at 2014 Design Automation Conference. Synopsys
45300
ARMv8-M architecture:
ARM has recently launched the next generation of the ARM Cortex-M MCU architecture, ARMv8-M. This webinar recording will give you an overview of the new architecture, its advantages for performance and security, and show what will change for developers of embedded systems. ARM
45528
Rob Dekker, CTO and Founder
Sanjay Gangal interviews Rob Dekker, CTO and Founder of Verific Design Automation at 2016 DAC. Verific
44726
Peter van den Eijnden
Sanjay Gangal interviews Peter van den Eijnden, Managing Director from JTAG Technologies at 2015 IPC/Apex Expo. JTAG Technologies
45069
Robert Schopmeyer, President
Sanjay Gangal interviews Robert Schopmeyer, President of Veritools at 2015 DAC Conference. Veritools
45255
John Tinson, VP Sales
Sanjay Gangal interviews John Tinson, VP of Sales of Sondrel at 2015 ARM Tech Con. Sondrel
45540
Rick Eram, VP Sales &
Sanjay Gangal interviews Rick Eram, VP Sales & Marketing of Excellicon at 2016 DAC Excellicon
45545
Chris Shore, Training
Sanjay Gangal interviews Chris Shore, Training & Education Manager of ARM at 2016 DAC. ARM
45384
Jean-Marie Brunet, Director
Sanjay Gangal interviews Jean-Marie Brunet, Director of Marketing of Mentor Graphics at 2016 DVCon. Mentor Graphics
40705
Tom Anderson pays tribute
Tom Anderson pays tribute to Ray Manzarek of Doors at 2013 DAC in Austin Breker Verification
44641
Kevin Nesmith, Chief Architect
Sanjay Gangal interviews Kevin Nesmith, Chief Architect from Si2 at 2015 DesignCon. Si2
45531
Mick Posner , Director,
Sanjay Gangal interviews Mick Posner, Director, Product Marketing of Synopsys at 2016 DAC. Synopsys
44731
N K Chari, Director of
Sanjay Gangal interviews N K Chari, Director of Marketing & Support from Keysight Technologies at 2015 IPC/Apex Expo. Keysight Technologies
45535
Rob van Blommestein,
Sanjay Gangal interviews Rob van Blommestein, VP of Marketing of S2C at 2016 DAC. S2C
43777
Whiteboard Wednesdays
In this week's Whiteboard Wednesdays, Kishore Kasamsetty provides a history on DDR4 technology. He also walks you through the improvements of DDR4 over DDR3, as well as the memory standard's specifications and the challenges of meeting these specifications. Cadence
45061
Stephane Petithomme,
Sanjay Gangal interviews Stephane Petithomme, Founder and CEO of So-ADE at 2015 DAC Conference. So-ADE
153327
Frederic Le Cam, Marketing
Sanjay Gangal interviews Frederic Le Cam, Marketing Product Line Manager of STMicroelectronics at 2016 ARM TechCon Conference. STMicroelectronics
44730
James Rathburn, President
Sanjay Gangal interviews James Rathburn, President of HSIO at 2015 IPC/Apex Expo. HSIO
45042
Anupam Bakshi, CEO
Sanjay Gangal interviews Anupam Bakshi, CEO of Agnisys at 2015 DAC Conference. Agnisys
44747
Cadence Software Driven
Sanjay Gangal interviews Frank Schirrmeister, Group Director of Cadence at 2015 DVCon. Cadence
45252
Rob van Blommestein,
Sanjay Gangal interviews Rob van Blommestein, VP of Marketing at S2C during 2015 ARM Tech Con. S2C
31364
SystemC Day, DVCon 2010,
Open SystemC Initiative (OSCI)
44751
Oski Offer Decoding Formal
Sanjay Gangal interviews Vigyan Singhal, President & CEO of Oski Technology at 2015 DVCon. Oski Technology
45029
Ellis Smith, CEO
Sanjay Gangal interviews Ellis Smith, CEO of Blue Pearl Software at 2015 DAC Conference. Blue Pearl Software
40678
ARM Mobile GPU Compute
GPU Compute Offload Balances Performance, Power, and Cost Patrick Moorhead, President and Principal Analyst Moor Insight and Strategy ARM
43908
Rob Stipek, Business
Interview with Rob Stipek, Business Development Specialist at Moldex3D at 2014 Design Automation Conference. Moldex3D
45246
Franz Maidl, Director
Sanjay Gangal interviews Franz Maidl, Director Global Tasking Business of Altium at 2015 ARM Tech Con. Altium
44631
Samuel P. Sattel, Director
Sanjay Gangal interviews Samuel P. Sattel, Director of Technical Sales from Altium at 2015 DesignCon. Altium
45398
Dan Hoz, General Manager
Sanjay Gangal interviews Dan Hoz, General Manager of Mentor Graphics at 2016 IPC/APEX Conference. Mentor Graphics
43509
Dieter Rudolf, Senior
Interview with Dieter Rudolf, Senior V.P. of Sales & Marketing at Frobas Frobas
40851
How to Make Your Designs
In this webcast you will learn about a unique design methodology that can turn any standard design into a robust first-pass success with high performance and RF yield. You will be able to immediately apply these techniques to your existing designs and improve their performance and reliability, thus allowing you to go to manufacturing with full confidence in meeting first-pass success. Agilent EESof
31309
A short demonstration
Tanner EDA
45296
Google's Colt McAnlis
Colt McAnlis, Developer Advocate at Google, warned against data and power taxation of IoT users at ARM TechCon 2015. ARM
45532
Paul Wells, CEO
Sanjay Gangal interviews Paul Wells, CEO of sureCore at 2016 DAC. surecore
45408
Gary Leong, Director
Sanjay Gangal interviews Gary Leong, Director of Business Development of Vitrox Technologies at 2016 IPC/APEX Expo. Vitrox Technologies
45245
Mateusz Uram, Sr Corporate
Sanjay Gangal interviews Mateusz Uram, Sr Corporate Engineer of Aldec at 2015 ARM Tech Conf. Aldec
45066
Rupert Baines, CEO
Sanjay Gangal interviews Rupert Baines, CEO of UltraSoC at 2015 DAC Conference. UltraSoC
45397
Arlin Horsley, President / CEO
Sanjay Gangal interviews Arlin Horsley, President and CEO of BajaBid at 2016 IPC/APEX Conference. Baja Bid
44707
Graham Bell, VP of Marketing
Sanjay Gangal interviews Graham Bell, VP of Marketing from Real Intent Inc at 2015 DesignCon. Real Intent, Inc.
45217
N K Chari, Director Marketing
Sanjay Gangal interviews N K Chari , Director Marketing & Support MSD of Keysight Technologies at 2015 ITC. Keysight Technologies
44728
Michael Ford & Mark Laing
Sanjay Gangal interviews Michael Ford & Mark Laing from Mentor Graphics at 2015 IPC/Apex Expo. Mentor Graphics
45028
Sam Appleton, CEO
Sanjay Gangal interviews Sam Appleton, CEO of Ausdia at 2015 DAC Conference. Ausdia
31308
A short demonstration
Tanner EDA
45405
Ofer Ton, President
Sanjay Gangal interviews Ofer Ton, President of FAST Technologies Corp. at 2016 IPC/APEX Expo. FAST Technologies Corp
45114
IMS2015 MicroApps - Coffee
The MIT OpenCourseware Coffee Can Radar project provides free lectures and plans for building a working DIY radar system. This basic homodyne radar system design is capable of Range, Doppler, and Synthetic Aperture imaging and can be built with off the shelf connectorized components that operate in the 2.4GHz open ISM bands.

This talk takes the original Radar System and analyze it with a true system tool so that a designer can easily look at metrics relevant to radar engineers. Different components for the transmitting power amplifier, receiving low noise amplifier, and the homodyne systems mixer are used in Visual System Simulator system tool to determine the effect on distance ranging, probability of detection, and velocity uncertainly.

Finally, an optimized system is presented that takes the original connectorized implementation and converts it to an all surface mount design with an integrated planar antenna. The new design embraces a full bits-to-beams implementation within Visual System Simulator and Microwave Office (AXIEM and Analyst software too) of the antenna as well as the board layout and circuit co-simulation with radar system metrics to reveal a successfully working design prototype prior to being built.

Presented by: Dr. Jim Carrol, Director IC Design Flows, AWR Group, NI
AWR
45301
ARM Forum 2015: Shaping
On November 3rd, 2015 we held our 2nd annual ARM Forum. This year our focus was STEM education. Our esteemed panel and audience asked how we ensure a long-term succession of world-leading scientists, technologists, engineers and mathematicians to imagine and lead us through the next technological revolution. ARM
43878
Zhihong Liu, CEO
Interview with Zhihong Liu, CEO of ProPlus Design Solutions ProPlus Design Solutions
45238
Ron Ih, Sr Manager, Marketing
Sanjay Gangal interviews with Ron Ih, Sr Manager, Marketing and Business of Atmel at 2015 ARM Tech Conference. Atmel
43927
Stuart Sutherland, President
Interview with Stuart Sutherland, President of Sutherland HDL at 2014 Design Automation Conference. Sutherland HDL
30555
Integrated Timing and
EMA Design Automation
45529
Samir Chaudhry, Director,
Sanjay Gangal interviews Samir Chaudhry, Director, Design Enablement of TowerJazz at 2016 DAC. TowerJazz
43507
Vigyan Singhal, President
Interview with Vigyan Singhal, President & CEO of Oski Technology Oski Technology
45073
Introduction to ARM Socrates
Introduction to ARM Socrates IP Tooling
ARM senior product manager Simon Rance speaks about the ARM® Socrates™ IP Tooling suite at 52DAC in the Moscone Center. Comprising three tools, CoreSight™ Creator, CoreLink™ Creator and Socrates Design Environment, the IP Tooling suite helps partners configure and integrate their SoC quickly and efficiently. To find out more please visit - http://www.arm.com/products/system-ip/ip-tooling/index.php
ARM
45122
IMS2015 MicroApps - Transceiver
This presentation covers subject matter such as transceiver module and satellite communication system analysis. It explores the pros and cons of three different transceiver architectures, investigating the benefits of each of the architectures, and discusses Visual System Simulator™ RF modeling capabilities in general. Subject matter such as forward error correction encoding, spread spectrum and GPS code generation is also covered. Throughout the presentation real time simulations are used to further demonstrate VSS exceptional simulation capabilities.

Additionally, the presentation highlights the new phased array capability in VSS that accounts for gain and phase offsets of each element, angles of incidence of the transmitted or incoming signal (theta and phi), and element location and operation frequency. The model enables users to configure the array using custom or standard element arrangements and tapers. Most importantly, it allows the user to specify non-linear characteristics of its elements, such as P1dB, IP3, NF, etc., and use them in evaluating system performance and measurements.

Presented by: Dr. Gent Paparisto, Product Manager RF Systems, AWR Group, NI
AWR
45318
"Upcoming Webinar, DVCon
Sanjay Gangal interviews Graham Bell, VP of Marketing of Real Intent, Inc. at DesignCon 2016 Real Intent, Inc.
45406
Tom Bell, Strategic Account
Sanjay Gangal interviews Tom Bell, Strategic Account Manager of MacDermid Enthone at 2016 IPC/APEX Expo. MacDermid Enthone
45121
IMS2015 MicroApps - In-Situ
Electromagnetic simulation software is commonly used to simulate antennas of various kinds. The antenna in turn needs to be driven from a circuit. The problem is that the circuit and antenna influence each other. This is because the antenna’s pattern is affected by the power and relative phasing at its various ports. In turn, the input impedance to the antenna can change with changing antenna pattern, for example, in the case of a scanned array. The impedance affects the performance of the circuit.

In this talk, we demonstrate how Microwave Office automatically accounts for the coupling between the antenna and the circuit in a easy-to-use framework. The designer identifies the antenna data source, the circuit schematic driving the antenna, and the measurement under consideration, for example the power radiated over scan angle. We illustrate the concept with a number of interesting examples in phased arrays, where the antennas are simulated in both 3D planar (AXIEM) and 3D finite-element (Analyst) electromagnetic simulators.

Presented by: Dr. John Dunn, EM Technologist, AWR Group, NI
AWR
40707
Raul Camposano with a
Raul Camposano with a Geeky joke at 2013 DAC in Austin Nimbic
42758
Partial Reconfiguration
Learn how Partial Reconfiguration of 7 series devices allows users to dynamically change portions of a design while the rest of the design remains operational. This video provides an overview of the Vivado Partial Reconfiguration solution, from features, benefits, and design considerations to a walkthrough of the flow in the Vivado Design Suite. For More Vivado Tutorials please visit: http://www.xilinx.com/training/vivado Xilinx
43903
Alan Scott, CEO
Interview with Alan Scott, CEO at Argon Design (on behalf of ChipStart) at 2014 Design Automation Conference. Argon Design
43896
Marleen Boonen, CEO
Interview with Marleen Boonen, CEO of Methods2Business Methods2Business
45218
Steve Pateras, Product
Sanjay Gangal interviews Steve Pateras Product Marketing Director of Mentor Graphics at 2015 ITC. Mentor Graphics
45219
Geoffrey Rodgers, Sr
Sanjay Gangal interviews Geoffrey Rodgers, Sr Director Software Sales of PDF Solutions at 2015 ITC. PDF Solutions
45034
Dean Drako, CEO
Sanjay Gangal interviews Dean Drako, CEO of IC Manage at 2015 DAC Conference. IC Manage
44882
Tarun Verma, Partner
Tarun Verma, a partner in Silicon Catalyst talks about his company and how they plan to help startups in semiconductor industry. Silicon Catalyst
42877
MemoryMirror* First Body-Controlled
The Intel® Core™ i7-based MemoryMirror takes the clothes shopping experience to a whole different level, allowing shoppers to try on multiple outfits, then virtually view and compare previous choices on the mirror itself using intuitive hand gestures. Users control all their data and can remain anonymous to the retailer if they so choose. The Memory Mirror uses Intel integrated graphics technology to create avatars of the shopper wearing various clothing that can be shared with friends to solicit feedback or viewed instantly to make an immediate in-store purchase. Shoppers can also save their looks in mobile app should they decide to purchase at a later time online.

For more information on Intel retail solutions, visit http://www.intel.com/retail.
Intel
43897
Ron Mabry, VP Sales
Interview with Ron Mabry, V.P. of Sales at Arasan Chip Systems Arasan
45224
Aftkhar Aslam, CTO
Sanjay Gangal interviews Aftkhar Aslam, CTO of yieldWerx at 2015 ITC. yieldWerx
43515
Cristian Amitroaie, CEO
Interview with Cristian Amitroaie, CEO of AMIQ AMIQ
43645
New Ascent XV Release
Graham Bell, VP of Marketing at Real Intent speaks with Sanjay Gangal, President of Internet Business Systems and EDACafe.com about the latest release of the Ascent XV X-verification system and its latest design reset optimization features. He also preview activities at the ChipEx conference in Israel on April 30, 2014 and the Design Automation Conference in San Francisco on the dates of June 2-4, 2014. Real Intent, Inc.
43915
Mehmet Cirit, President
Interview with Mehmet Cirit, President at Library Technologies at 2014 Design Automation Conference. Library Technologies
43918
Ashraf Takla, CEO
Interview with Ashraf Takla, CEO at Mixel at 2014 Design Automation Conference. Mixel
153323
Rich D'Souza, US General
Sanjay Gangal interviews Rich D'Souza, US General Manager of IAR Systems at 2016 ARM TechCon Conference. IAR Systems
44725
Anthony Ambrose, CEO
Sanjay Gangal interviews Anthony Ambrose, CEO of DataI/O at 2015 IPC/Apex Expo. DataI/O
43634
Jerry Long, Product Marketing
Interview with Jerry Long, Product Marketing Manager at EMA EMA
45045
Karsten Einwich, CEO
Sanjay Gangal interviews Karsten Einwich, CEO of Coseda at 2015 DAC Conference. Coseda
153322
Louie de Luna, Director
Sanjay Gangal interviews Louie de Luna, Director of Marketing of Aldec at 2016 ARM TechCon Conference. Aldec
40709
Mick Posner - P is Silent
Mick Posner tries a stand up routine at the 2013 DAC in Austin Synopsys
44914
Standard Versus Custom
How can custom IO design set you apart from the competition? Find out from the best in the business, Stephen Fairbanks. Certus Semiconductor
44191
ZofzPCB: FREE 3D Gerber
The fastest, easiest, most intuitive way to check your PCB design…
before it goes to manufacturing.
ZofzPCB
43510
John Brennan
Interview with John Brennan, Product Marketing Director at Cadence Cadence
45230
ARM Forum 2015: Shaping
On November 3rd, 2015 we held our 2nd annual ARM Forum. This year our focus was STEM education. Our esteemed panel and audience asked how we ensure a long-term succession of world-leading scientists, technologists, engineers and mathematicians to imagine and lead us through the next technological revolution. ARM
31368
SystemC Day, DVCon 2010,
Open SystemC Initiative (OSCI)
43880
Uri Tal, CEO
Interview with Uri Tal, CEO of Rocketick at the 2014 DAC Rocketick
45025
Pavlo Leshtaiev, Product
Sanjay Gangal interviews Pavlo Leshtaiev, Product Manager of Aldec at 2015 DAC. Aldec
45242
Simon Blake-Wilson, VP
Sanjay Gangal interviews with Simon Blake-Wilson, VP Product and Marketing of Rambus at 2015 ARM Tech Conf. Rambus
44642
Yuriy Shlepnev, President
Sanjay Gangal interviews Yuriy Shlepnev, President from Symberian at 2015 DesignCon. Symberian
36176
High Resolution Twin
PCBMotor ApS
41608
Arasan Webcast: Design
Webinar recorded on May 2013 Arasan
45005
V11 - Design and Optimization
In this presentation, the task of optimizing a coax-to-microstrip transition at a specified design frequency will be showcased using Analyst™. The goal is to maximize the transmission of energy from the coax TEM mode into the microstrip quasi-TEM mode. Addtionally, some useful tips to achieve the goal will be demonstrated as well as demonstrating how the optimized and parameterized transition model can be conveniently used as part of any future Microwave Office design. AWR
45220
Steve Groden, Account Manager
Sanjay Gangal interviews Steve Groden Account Manager of ProbeLogic at the 2015 ITC. ProbeLogic
45231
Mike Muller Keynote Highlights
View highlights from ARM’s CTO, Mike Muller’s keynote on “Innovation is Thriving in Semiconductors” at ARM TechCon 2015, including announcement of ARM Cortex-A35, ARM TrustZone for ARMv8-M, Cryptocell, and mbed connector. ARM
43633
Christian Legare, Executive
Interview with Christian Legare, Executive Vice President and CTO of Micrium Micrium
43905
Piyush Sancheti, V.P.
Interview with Piyush Sancheti, V.P. Marketing at Atrenta at 2014 Design Automation Conference. Atrenta
45044
Paul Cunningham, VP R&D,
Sanjay Gangal interviews Paul Cunningham, VP R&D, Digital and Signoff Group of Cadence at 2015 DAC Conference. Cadence
44639
Mahmoud Wahby, Marketing
Sanjay Gangal interviews Mahmoud Wahby, Marketing Manager from National Instruments at 2015 DesignCon. National Instruments
45063
Michael Thompson, Sr.
Sanjay Gangal interviews Michael Thompson, Sr. Manager of Product Marketing of Synopsys at 2015 DAC Conference. Synopsys
45002
Introduction to the ARM
ARM® CoreLink™ System IP plays a key role in enabling partners deliver optimized ARM-based SoCs. The CoreLink CCI-500 Cache Coherent Interconnect extends the performance and low power leadership of ARM mobile systems. ARM
42763
UltraScale Overview with
Xilinx Senior Vice President Victor Peng discusses the strategy behind the industry's first All Programmable ASIC-class architecture. Xilinx
42811
LTE Small Cell Base Station
Dr. Jaakko Juntunen shows how to optimize LTE small cell base station antenna for maximum efficiency using AWR Analyst software.

For a recorded video version of this topic from AWR User Group Meeting, please visit: https://publisher.qbrick.com/Embed.aspx?mid=DAE661AB
AWR
153427
Mark Gilbert, President
Sanjay Gangal interviews Mark Gilbert, President of EDA Careers at 2016 ARM TechCon Conference. EDA Careers
42768
Debugging Linux applications
This video shows how to use ARM® DS-5 Altera Edition, part of the Altera® SoC EDS toolkit, to debug a Linux application running on an Altera Cyclone® V SoC-based board. Using the Blinking LED example from Altera, the video shows how to setup the Remote System Explorer in the DS-5 Eclipse IDE to have drag-n-drop access to target's file system via SSH. It also demonstrates how to set up your first Linux application connection to a remote gdbserver and how to step though the code of a multi-threaded application running on the dual ARM Cortex®-A9 processing system on the Altera SoCs.
You will noticed that DS-5 Debugger's UI provides a uniform look and feel to your debugging experience, regardless of the software layer that you are working on: userspace, kernel or bare-metal.
For more videos, search YouTube's armflix channel for "ARM DS-5 Altera"

More details on the DS-5 Altera Edition available on http://ds.arm.com/altera/
ARM
45254
Dave Edwards, CEO/CTO
Sanjay Gangal interviews Dave Edwards, CEO/CTO of Somnium Technologies at 2015 ARM Tech Con. Somnium Technologies
41017
Tech Seminar: High-Performance
There are dozens of occasions where designers need to verify the equivalency of two different circuit descriptions -- confirming low power optimizations were inserted correctly, verifying an algorithmic change or performance optimization in the RTL didn't break the desired functionality, etc. In this seminar Vigyan Singhal, the CEO of formal services provider Oski Technology, shows how a combination of optimized engines and a dedicated input wizard and GUI enables users of Jasper's Sequential Equivalency Checking (SEC) app to verify sequential behavioral equivalency up to 300% faster than trying to manually apply un-optimized formal technologies.

Want to learn more? Contact Jasper via info@jasper-da.com, or Oski Technology via their website http://www.oskitechnology.com/contact
Jasper
153355
Andy Nightingale, VP
Sanjay Gangal interviews Andy Nightingale, VP of System IP Marketing of ARM at 2016 ARM TechCon Conference. ARM
43605
ARM big.LITTLE Technology
ARM big.LITTLE technology is a heterogeneous processing
architecture that uses two types of processor to deliver optimum performance and battery life for mobile devices.

A 'LITTLE' processor provides maximum power efficiency for everyday tasks, while a 'big' processor provides maximum compute capacity when required.
ARM
31366
SystemC Day, DVCon 2010,
Open SystemC Initiative (OSCI)
43638
Richard Man, Founder
Interview with Richard Man, Founder and Chief Developer at Imagecraft Imagecraft
153436
Yoan Dupret, Business
Sanjay Gangal interviews Yoan Dupret, Business Development Director of Menta at 2016 ARM TechCon Conference. Menta
43759
Introduction to Power
The course is an introduction to switched-mode power converters. It provides a basic knowledge of circuitry for the control and conversion of electrical power with high efficiency. Coursera
43192
TimingDesigner Sigrity
Cadence
153401
Jeff Defilippi, Sr Product
Sanjay Gangal interviews Jeff Defilippi, Sr Product Manager of ARM at 2016 ARM TechCon Conference. ARM
153434
Jim McElroy , VP Marketing
Sanjay Gangal interviews Jim McElroy, VP Marketing of LDRA at 2016 ARM TechCon Conference. LDRA
31371
SystemC Day, DVCon 2010,
Open SystemC Initiative (OSCI)
43464
Stephen Bailey
Interview with Stephen Bailey, Director of Emerging Technologies at Mentor Graphics Mentor Graphics
31370
SystemC Day, DVCon 2010,
Open SystemC Initiative (OSCI)
43882
Massimo Sivilotti, Chief
Interview with Massimo Sivilotti, Chief Scientist at Tanner EDA Tanner EDA
45240
Frank Schirrmeister,
Sanjay Gangal interviews with Frank Schirrmeister, Sr Group Director Product Management of Cadence at 2015 ARM Tech Conference. Cadence
42741
Salinas Crop Circle -
The last weekend of 2013, NVIDIA set out to create an iconic piece of art to celebrate the hard work of the engineers who created the Tegra K1 mobile processor -- a crop circle in Chualar, Calif., near the city of Salinas. Learn about why we did it, where we did it, and how we pulled it off. It certainly got the attention we wanted, and then some. Many thanks to the people of Chualar for being a part of it!

Learn more about Tegra K1 at http://blogs.nvidia.com/blog/2014/01/05/salinas-crop-circle-and-project-192.
Nvidia
43260
Chris Banton
Interview with Chris Banton, Marketing Manager at EMA Design Automation EMA Design Automation
42833
One-on-One with FCC Chairman
One-on-One with FCC Chairman Tom Wheeler CES
153340
Geoffrey Tate, CEO &
Flex Logix
42770
Big data begins with
Big data begins with little data
The videos were taken live on September 17, 2103 at ARM's Internet of Things breakfast in Silicon Valley. The purpose of this invitation only event was to educate executives about how ARM can help their companies migrate into the mixed-signal/digital world. Mike Muller discussed key topics including:

1. How little data from sensor networks will become the big data that is the foundation for life-enhancing and business-optimization opportunities.

2. Overview of a new Internet of Things (IoT) study by the Economist Intelligence Unit - What regions and what industries are leading the IoT charge, what are some of the industry or government initiatives to enable IoT, and what business leaders are saying about the IoT market and how they are investing in IoT

3. Partnering to enable success in the IoT - How to add a little digital spice to create mixed-signal products that will enable IoT, and working with ARM and what that could mean to you
ARM
43513
Robert Beanland
Interview with Robert Beanland, Senior Director, Corporate Marketing at Atrenta Atrenta
42773
ARM CEO insights: Fireside
Fireside chat with ARM CEO Simon Segars about the status of the Internet of Things, opportunities in mobile, the use of big data, and industry trends that ARM is focusing on.

Michal Lev-Ram, enterprise & mobile tech writer at Fortune, @mlevram
Simon Segars, ARM CEO, @simonsegars
ARM
42775
Future of Tech in Health
ARM TechCon 2013 keynote presentation by Daniel Kraft, MD
"The Future of Technology in Health and Medicine: Game-Changing Lessons For Every Industry"

Daniel Kraft is a Stanford- and Harvard-trained physician-scientist with over 20 years of experience in clinical practice, biomedical research and innovation. Dr. Kraft chairs the Medicine track for Singularity University and is Executive Director and curator for the FutureMed, a program which explores convergent, exponentially developing technologies and their potential in biomedicine and healthcare.

http://singularityu.org/bio/daniel-kraft/
@daniel_kraft
ARM
43191
Optimizing Filter Performance
This video shows how circuit simulation, integrated with 3D EM simulation, is used to optimize the performance of a low-pass filter design.

An example of coil inductors on a PCB illustrates how integrated 3D EM simulation is used to move from an ideal filter design to a physical design. 3D coil inductor models are created in Agilent's EMPro software, and used in Agilent's ADS software, where a full 3D EM simulation analyzes all of the physical effects, including parasitics of the filter.

For more information on Agilent's EMPro software:http://www.agilent.com/find/eesof-empro
For a free trial of EMPro: http://www.agilent.com/find/eesof-empro-info
Agilent EESof
42774
ARM CEO Simon Segars
ARM's CEO, Simon Segars speaks about his vision for transformative technology in the Internet of Things (IoT), data center and mobile. ARM
42019
New Ascent Lint and X-verification
Interview with Graham Bell, V.P. of Marketing at Real Intent Real Intent, Inc.
43149
Nikos Zervas
Interview with Nikos Zervas, Chief Operating Officer at CAST CAST
31369
SystemC Day, DVCon 2010,
Open SystemC Initiative (OSCI)
42805
CES 2014 - Internet of
Intel, Rest Devices and Autodesk on the Internet of Onesies, Bottle Warmers, and Coffee at CES 2014.

A fireside chat with Intel CEO Brian Krzanich discussed how everyday objects from bottle warmers and baby clothing to coffee mugs and vending machines are increasingly infused with intelligent technologies to improve people's lives and open the door to knew opportunities for businesses.
Intel
43506
Tom Anderson, V.P. of
Interview with Tom Anderson, V.P. of Marketing at Breker Verification Breker Verification
43381
Simulating Zynq BFM design
Learn how to run simulation with ZYNQ BFM IPI design using Synopsys VCS simulator in Vivado. We will provide a demonstration on how to compile simulation libraries, generate simulation scripts for an IP or an entire project and then run simulation. Xilinx
43503
Mark Gilbert, President
Interview with Mark Gilbert, President of EDA Careers EDA Careers
43607
Using Vivado with Xilinx
Learn how the board-aware features of the Vivado Design suite can be used to quickly configure and implement designs targeting Xilinx Evaluation Boards. See how the IP Integrator presents all of the possible IP interfaces into the Board and how they can easily be configured and connected in your design. See how all of the logical and physical parameters and constraints are automatically assigned and passed to the downstream implementation tools. For More Vivado Tutorials please visit: http://www.xilinx.com/training/vivado Xilinx
42761
ARM Tech Con 2013 - Xilinx
Theater Presentation from ARM Tech Con 2013 ARM
44205
ADS Overview 2014
In this video we show the Advanced Design System, ADS, the powerful, easy, and complete design solution for RF, microwave, and high-speed digital designers. See capabilities such as a complete multi-technology design flow including layout and verification, integrated EM, and advanced models such as X-parameters.

For more information: http://www.keysight.com/find/eesof-ads
For a free evaluation copy of ADS: http://www.keysight.com/find/eesof-ads-evaluation
Keysight EEsof EDA
45020
V11 - Design and Simulation
In this video Steve Tucker gives a detailed overview of the Radar Library in Visual System Simulator™ including LabVIEW integration.

Presented by: Steve Tucker, Senior Applications Consultant, AWR Group, NI
AWR
44744
Downstream BluePrint
Mark Gallant from DownStream Technologies presents an overview of BluePrint PCB documentation tool DownStream Technologies
31367
SystemC Day, DVCon 2010,
Open SystemC Initiative (OSCI)
42764
Vivado IP Constraints Overview
Learn what constraints that an IP can deliver, what constraints are created for IP during flow, synthesized design checkpoint (DCP) for IP and constraints processing order during DCP creation and synthesis of top level design. For More Vivado Tutorials please visit: http://www.xilinx.com/training/vivado Xilinx
43148
Fred Hickman
Interview with Fred Hickman, Sr. Director of High Speed Digital Products at Isola Group Isola Group
42800
AUDI A3 featuring NVIDIA
Audi A3 vehicle featuring Nvidia visual computing model based on Tegra 3 processor (Quad ARM Cortex-A9 processor) showcased at CES. The new Tegra K1 processor is also introduced at the end of this video. http://www.nvidia.com/object/tegra-3-processor.html ARM
42772
Server Solutions from
Technical presentation from ARM TechCon: Server Solutions from ARM
Speakers:
Jeff Underhill, Director of Server Programs, ARM
Ian Forsyth, Product Manager, ARM Processor Division
ARM
43179
Bill Hargin
Interview with Bill Hargin, Director of North American Sales & Marketing at Nan Ya Plastics Corporation Nan Ya Plastics Corporation
44745
Using templates in BluePrint
This video will show how to use Document templates to automate and speed up the creation of PCB Document sets. DownStream Technologies
41338
Getting started with
This video shows how to get started with Synflow Studio by cloning a Git repository, creating a new project and a new task. Synflow
42778
Intro to TechCon & Industry
Tom Lantzsch, EVP Strategy, ARM, gives an introduction to ARM TechCon 2013 and a high-level look at where the electronics industry. ARM
42735
NVIDIA press conference
Photo-Real Next-Gen Gaming: Rendering the human face. NVIDIA co-founder and CEO Jen-Hsun Huang at the company's press conference at CES 2014 in Las Vegas. Nvidia
45251
New Physical CDC Sign-off
Sanjay Gangal interviews Graham Bell, VP, Marketing of Real Intent, Inc. at 2015 ARM Tech Con. Real Intent, Inc.
42737
NVIDIA press conference
Tegra K1 in Auto: NVIDIA end-to-end. NVIDIA co-founder and CEO Jen-Hsun Huang at the company's press conference at CES 2014 in Las Vegas. Nvidia
42777
The New Style of IT &
Keynote Presentation: The New Style of IT
Speaker: Martin Fink, CTO and Director of HP Labs, Hewlett-Packard Company

It's an exciting time to be in technology. The IT industry is at a major inflection point driven by four generation-defining trends: the cloud, social, Big Data, and mobile. These trends are forever changing how consumers and businesses communicate, collaborate, and access information. And to accommodate these changes, enterprises, governments and fast growing companies desperately need a "New Style of IT." Shaping the future of IT starts with a radically different approach to how we think about compute -- for example, in servers, HP has a game-changing new category that requires 80% less space, uses 89% less energy, costs 77% less--and is 97% less complex. There's never been a better time to be part of the ecosystem and usher in the next-generation of innovation.
ARM
42779
Enabling Compelling Services
Keynote Presentation: Enabling Compelling Services for IoT
Speaker: Nandini Ramani, Vice President, Java Platform, Oracle

The Internet of Things will only truly succeed through the successful deployment of value added services and by improving efficiencies. Java enables these services with ease of deployment and leverages an extensive, vibrant developer community that can focus on deploying applications across a range of products from memory-constrained ARM Cortex-M based sensors to high performance ARM Cortex-A class devices. Hear how ARM and Oracle are collaborating to enable this developer community to reap benefits for the Internet of Things.
ARM
42771
Low Power Leadership
Low Power Leadership for a Smarter World
The videos were taken live on September 17, 2103 at ARM's Internet of Things breakfast in Silicon Valley. The purpose of this invitation only event was to educate executives about how ARM can help their companies migrate into the mixed-signal/digital world. Key topics include:

1. Big Data begins with Little Data - How little data from sensor networks will become the big data that is the foundation for life-enhancing and business-optimization opportunities.

2. Overview of a new Internet of Things (IoT) study by the Economist Intelligence Unit - What regions and what industries are leading the IoT charge, what are some of the industry or government initiatives to enable IoT, and what business leaders are saying about the IoT market and how they are investing in IoT

3. Partnering to enable success in the IoT - How to add a little digital spice to create mixed-signal products that will enable IoT, and working with ARM and what that could mean to you
ARM
42815
Audi Keynote CES 2014
Rupert Stadler and Ulrich Hackenberg of Audi present the solutions for automotive megatrends. CES
43636
Ricardo Anguiano
Interview with Ricardo Anguiano, Technical Marketing Engineer at Mentor Graphics Mentor Graphics
42830
CES 2014 - Conflict Free
A conversation and moderated Q&A with Intel and social activists on the challenge for the electronics industry, as a main users of metals from the Democratic Republic of the Congo, in making conflict-free products.
Participants:
· Intel CEO Brian Krzanich
· Actress & Activist Robin Wright
· Enough Project Policy Director Sasha Lezhnev
· Moderated by Marc Gunther, Editor at Large, The Guardian
Intel
42765
Vivado Methodology DRCs
Learn about the new DRCs introduced in Vivado 2013.3, how to detect issues in design constraints, how to identify performance bottlenecks and command usage of methodology_checks and timing_checks. For More Vivado Tutorials please visit: http://www.xilinx.com/training/vivado Xilinx
44702
DVCon 2015 - Peggy Aycinena
DVCON is on March 2-5, 2015 at Doubletree, San Jose, CA.

DVCon is coming to San Jose from March 2nd to 5th. If you have any doubts about going, you should spend 12 minutes watching Peggy's interview with DVCon General Chair Yatin Trivedi of Synopsys and Technical Program Committee Chair Ambar Sarkar of Paradigm Works. The sheer joy these two gentlemen and their team are bringing to the work of organizing the upcoming event is totally evident there. And as they explain so well, these days that joy is not just limited to DVCon San Jose.

Now Yatin and Ambar, and many like-minded volunteers, are spreading the good works of the conference around the globe with DVCon Europe and DVCon India, newly launched companion events that debuted in 2014. Both were sell-out successes, according to Ambar and Yatin, and will now provide two additional opportunities each year for design and verification engineers to network, learn, and contribute. An impressive outcome of the efforts of so many, as noted enthusiastically in the interview.
Synopsys
44743
DFMStream Overview
Mark Gallant of DownStream Technologies presents an overview of DFMStream features and functionality. DownStream Technologies
41340
Testing an IP with Synflow
This video shows how to test an IP with Synflow Studio. The IP I'm testing here is the behavioral implementation of SHA-256 that I wrote, you can see the code on GitHub: https://github.com/synflow/sha-256

I hope you enjoy this video, while I make an optimized implementation of SHA-256 that is suitable for Bitcoin mining :-)
Synflow
43508
Oz Levia, V.P. of Marketing
Interview with Oz Levia, V.P. of Marketing at Jasper Design Automation Jasper
42776
IoT Keynote: It's The
"Little things are going to make a big difference" - Keynote presentation by John Cornish, EVP and GM, System Design Division, ARM. ARM
43574
PCB Fabrication & Assembly
We help our customers save time and money across all industries by meeting the toughest deadline with our expertise in High Quality PCB and High Mix-low cost, low volume PCB Assembly. http://www.eprotos.com


Precision Technologies - Eprotos.com specializes in quick-turn PCB boards and assembly for low-volume, NPI and prototype orders. Harness the Power of One Stop Solution and eliminate the hassle of dealing with multiple suppliers.

Contact us at 1-888-228-9440 or visit http://www.eprotos.com
Precision Technologies Inc
43652
DIY Robot Converts Data
Find this and other technology news stories at http://vid.io/xqV.

Twitter, infrared motion sensors drive robot movement.

Data Monster checks data streams online and converts to motions, gestures and mood, depending on the data, says Lucas Ainsworth, Intel research scientist. With a simple and inexpensive kit, Makers can create their own data-driven robot.

SEE MORE:
Tweets Rouse Moody Robot
Maker robot reacts to Twitter and motion input.

Send a tweet to Data Monster if you dare -- the robot has been known to respond violently to Twitter. Data monster doesn't only react to social media, the 2-foot tall, wood and metal robot can convert other data input into gestures, actions and motions, according to an Intel researcher.

http://www.intelfreepress.com/news/tweets-rouse-moody-robot/7448

Find this and other technology news stories at http://vid.io/xqV.
Intel
153445
Rob van Blommestein,
Sanjay Gangal interviews Rob van Blommestein, VP of Marketing of S2C at 2016 ARM TechCon Conference. S2C
42733
NVIDIA press conference
Chips: Tegra K1 features 192 cores. NVIDIA co-founder and CEO Jen-Hsun Huang at the company's press conference at CES 2014 in Las Vegas. Nvidia
45235
Get to Know the ARM Cortex M7
Are you looking for more processing power and enhanced DSP capabilities? Then make yourself familiar with the ARM Cortex-M7. In this video we will do a family comparison and give you the details of the architecture.

The use cases will show how to meet your computation power requirements. Is your design about to start? We will introduce the available silicon solutions from our partners.

Getting Started with STM32F7. Watch: https://www.youtube.com/watch?v=D5Z-WTN__js

Getting Started with Atmel SAM V7. Watch: https://www.youtube.com/watch?v=O12k93-D95E
ARM
42159
Oliver Ribet, V.P. High
Interview with Oliver Ribet, V.P. High Tech Industry at Dassault Systèmes Dassault Systemes America
42767
OmniTek Ultra HDTV Image
Mike Hodson, President of OmniTek, demonstrates the Ultra HDTV Imaging Processing technology at ARM TechCon 2013. Xilinx
42836
Technology Inovators-
Technology Inovators- FutureCast: Global Innovation of Mobile CES
45011
V11 - RF Inspector Overview
This short video gives an overview of Visual System Simulator's RF Inspector (RFI™) technology. RFI is a frequency-domain simulation tool that helps determine the root cause or heritage of any intermodulation product of an RF link and includes the effects of conversions, harmonics, and intermodulation. AWR
42837
Tech Titans - Gary Shapiro
Tech Titans - Gary Shapiro CES
42742
Detecting System-Level
Abhinav Nawal from Freescale stepped above the traditional directed test approach for (Common Power Format) CPF low-power verification. He used Cadence® Incisive® Enterprise Manager, Incisive Enterprise Simulator, SimVision debug, and the Incisive Metric Center to find many critical system-level corner case issues, which, left undetected, would have been catastrophic for his SoC. Cadence
42812
Samsung Press Conference
This is the Samsung Press Conference at CES 2014.
[삼성전자 CES 2014 프레스 컨퍼런스 영상입니다.]

At the press conference, Samsung Electronics has announced its vision for future home, and also introduced its latest innovations in consumer electronics including 105-inch curved UHD TV, 85-inch 'bendable' UHD TV, Food ShowCase refrigerator, Motion Sync upright vacuum cleaner and 12.2-inch Galaxy Note Pro.

Samsung Tomorrow TV's CES 2014 Special playlist:
http://www.youtube.com/playlist?list=PLTHa7qutpLjA0KTGxmTejobEc_upDm7x2
Samsung Semiconductor
43181
Ron Pieraldi
Interview with Ron Pieraldi, Global Sales Manager at Alpha Wire Alpha Wire
42740
NVIDIA Tegra K1 Demo:
NVIDIA® Tegra® K1 is Impossibly Advanced, bringing the same NVIDIA Kepler™ architecture that drives the world's most extreme gaming PCs to mobile gaming. For the first time ever, EPIC's Unreal Engine 4 is running on a mobile platform, the new NVIDIA Tegra K1. This is the first-ever console-class mobile technology, enabling PC-class gaming technologies like DirectX 11, OpenGL 4.4 and tessellation — all in the palm of your hands. Nvidia
45233
Getting Started with
Do you need an ARM® Cortex®-M7 processor-based platform running at 300 MHz? Take the first steps with the Atmel SAM V71 Xplained Ultra board and MDK Version 5. In a live demo, learn how to set up a basic project and test your debug connection. Get the most out of the documentation and available example projects.

Do you require sophisticated communication stacks? A MDK-Professional Middleware project demonstrates the software ease-of-use and the power of this platform.
Atmel
153424
Gopal Hegde, VP
Sanjay Gangal interviews Gopal Hegde, VP of Cavium at 2016 ARM TechCon Conference. Cavium
42739
NVIDIA press conference
Project Mercury: Fully configurable digital dashboards. NVIDIA co-founder and CEO Jen-Hsun Huang at the company's press conference at CES 2014 in Las Vegas. Nvidia
43505
Michiel Ligthart, V.P.
Interview with Michiel Ligthart, V.P. of Marketing at Verific Verific
42738
NVIDIA press conference
Supercomputer in Your Car: Driving advanced driver assistance systems. NVIDIA co-founder and CEO Jen-Hsun Huang at the company's press conference at CES 2014 in Las Vegas. Nvidia
42749
2013 CES: Dr. Paul E.
Are you born mobile? Dr. Paul E. Jacobs, chairman and chief executive officer at Qualcomm, gives the 2013 CES Preshow Keynote. CES
43190
O'Reilly Webcast: Raspberry
In this interactive webcast with Ed Snadjer as he show's you how to quickly and simply get your Raspberry Pi up and running and the possibilities of what can be done with a $35 credit-card sized computer. There are people all over the world doing fantastic things with their Raspberry Pis and big brains.

In this hands-on webcast we explore:

What is a Raspberry Pi
What are the features of a Raspberry Pi
What's the difference between a Raspberry Pi and Arduino
How to set up your Raspberry Pi
Troubleshooting your Raspberry Pi
Cool things being done with Raspberry Pi
Inspiring you to make awesome things with Raspberry Pi
O
42855
Parrot MiniDrone & Parrot
Stay Tuned:http://www.parrot.com

Parrot MiniDrone: A miniature drone piloted in Bluetooth Smart with a Smartphone or a tablet, that flies... and rolls from floor to ceiling.

Parrot Jumping Sumo: The first robot-insect, controlled in Wi-Fi 2.4 or 5GHz with a Smartphone or a tablet that spins, jumps up to 80 cm and takes 90 degree turns.

Release date to be announced...
CES
45234
Getting Started with STM32F7
Do you need a drop-in replacement for your STM32F7 device with more power? Take the first steps with the STM32F7 Discovery board and MDK Version 5. In a live demo, learn how to set up a basic project, integrate STM32 Cube and test your debug connection. We'll show how to find documentation and where to look for example projects. You want to use all of its communication peripherals? An MDK-Professional Middleware project will demonstrate the power of this platform together with MDK Version 5. ST Microelectronics
42734
NVIDIA press conference
Solving the Developer's Dilemma: Running Unreal Engine 4 on mobile. NVIDIA co-founder and CEO Jen-Hsun Huang at the company's press conference at CES 2014 in Las Vegas. Nvidia
42816
Sony CES Keynote 2014
Watch the Sony CES 2014 Keynote with Sony President and CEO Kazuo Hirai

#SonyCES Sony.com/CES
CES
42834
CES 2014: How Today's
CES 2014: How Today's Emerging Technologies will Affect Tomorrow's Devices CES
42769
FPGA-adaptive debug on
Watch in this video examples of how to use DS-5 unique FPGA-adaptive capabilities to debug your system across CPU and FPGA domains. Here DS-5 Altera Edition, part of Altera® SoC EDS toolkit, and Quartus are used simultaneously to connect to a Dual-core ARM Cortex®-A9 Altera Cyclone V SoC board via Altera USB Blaster II to enable software-hardware co-development.
Use the DS-5 Debugger to view the content of custom hardware (FPGA) registers at any point when you halt the CPU. Then learn how to use Signal Tap II and DS-5 to setup system-wide break conditions, which can be used to stop the CPUs when a specific signal on the FPGA side transitions from high to low, for instance. Then visualize the status of both software and hardware using the two tools simultaneously. Finally, see how the CoreSight™ System Trace Macrocell (STM) can be used as a powerful instrumentation tool to bring together hardware and software worlds, simplifying your development process.
ARM
42835
The Brand Matters SuperSession:
The Brand Matters SuperSession: Technology as Muse - Inspiring Innovation CES
43911
Adam Edstrom, CEO
Interview with Adam Edstrom, CEO at Elsip at 2014 Design Automation Conference. Elsip
45181
High Level Synthesis
Video showing what HLS Design Space Exploration is. The video also shows the difference between DSE when an ASIC or a FPGA is targeted. The Hong Kong Polytechnic University
45232
Optimize your Embedded
When developing embedded applications, important aspects are minimising hardware costs, optimizing resource usage, and improving system performance. Modern development environments offer various profiling utilities to identify the optimization potential of your application. This webinar recording will show how you can use features like performance analysis, stack watermarking and event viewer
to analyze your code and find hotspot functions or oversized stack allocations.
ARM
45236
Holistic profiling of
Developers of sophisticated vision applications need all the processing power they can lay their hands on, and using OpenCL™ on a GPU can be a vital additional compute resource. But spreading the workload amongst processors and processor types brings its own problems and difficulties, and traditional application optimisation techniques are not always effective in this brave new heterogeneous world. The key to achieving performance is twofold: getting access to hardware counters for all the processors in your system, and then understanding what those numbers are telling you. In this talk I examine the tools and techniques available to profile these sorts of applications and use real case studies from vision applications. Using tools like DS-5 Streamline I show how to extract meaningful performance numbers and how to interpret them. ARM
43514
Randy Smith, V.P. Marketing
Interview with Randy Smith, V.P. Marketing at Sonics Sonics
43631
ADS Electro-Thermal Simulation
These 30-second demos quickly cover the new technologies and capabilities that make ADS 2014 the most significant ADS release to date! Watch and win! Go to http://www.agilent.com/find/eesof-ads-30-second-demos to watch all the videos and comment for a chance to win $100 (promotion rules are on website). Agilent EESof
42731
CES TV: What's NEW for
A magical mix of inspiring innovation, the future defines the International CES as brand new areas of the show floor are set to amaze. CES
43490
High speed processing
Learn more: http://bit.ly/1etCtw1
This is an example of a typical vision algorithm processing (i.e. Filters, Color conversion, Gradient calculation etc.). All image pre-processing is handled in the FPGA. The streaming approach used in the FPGA is the best low power, low latency way to handle such high throughput applications like video processing in real time.
Altera
43807
Genesys 2014 Overview
In this video we show Agilent Genesys, the affordable accurate and easy to use RF design & simulation tool created for RF circuit board and subsystem designers.

We focus on three capabilities that showcase why Genesys 2014 provides the optimal balance of capabilities with ease-of-use: automatic circuit synthesis, RF system analysis, and integrated electro-magnetic simulation.

For more information on Genesys 2014, please visit www.agilent.com/find/eesof-genesys2014.
For a free trial of Genesys 2014, please visit www.agilent.com/find/eesof-genesys-info.
Agilent EESof
43489
Ultra Compact Stereo Vision IP
Learn more: http://bit.ly/1etCtw1
This is a Cyclone IV based Stereo camera demo to calculate object range by stereo vision matching algorithm. It's ultra compact logic size of IP with high performance and low latency, jointly developed with Saneyoshi Laboratory of Tokyo Institute of Technology.
Altera
44883
Two Luminaries: Intel
Speakers:
Greg Becker, President & CEO, Silicon Valley Bank
Arvind Sodhani, Executive Vice President, Intel; President, Intel Capital

Two singularly successful industry leaders exchange views and share insights about key trends and opportunities for innovation and economic growth. What do they see as the current state of Silicon Valley; what’s coming in technology; and what might the financial markets hold this year? How long might the current boom last, and what will follow it? Arvind Sodhani has been called “the smartest VC in the world.” He is executive vice president at Intel and president of Intel Capital, one of the oldest and largest corporate venture arms, which Sodhani himself helped start and build. As President & CEO of Silicon Valley Bank, Greg Becker leads a pioneering financial services organization that serves the innovation sector globally. SVB is one of the fastest-growing public companies in the U.S. and was named by Fortune as a best place to work. Don’t miss this rare opportunity to gain inside perspectives from two of today’s most respected business and financial leaders.

Co-hosted by: Intel Capital and Silicon Valley Bank
Intel
42732
NVIDIA press conference
Next-Gen PC Gaming: GameStream and G-SYNC. NVIDIA co-founder and CEO Jen-Hsun Huang at the company's press conference at CES 2014 in Las Vegas. Nvidia
42753
Anytime Anywhere Content
2013 CES: Anytime Anywhere Content CES
42804
World`s First Bendable
Abraham from Samsung Tomorrow TV introduces the world's first bendable TVs right from CES 2014 in Las Vegas! Let's be world's first viewers to check out Samsung's latest amazing innovations, bendable UHD TVs.

Samsung Tomorrow TV @ CES 2014 Special
http://www.youtube.com/playlist?list=PLTHa7qutpLjA0KTGxmTejobEc_upDm7x2
Samsung Semiconductor
45077
SystemC part1
Tutorial about how to download the SystemC package from the web (Accellera.org), SystemC benchmarks (s2cbench.org) and how to set it up in Linux The Hong Kong Polytechnic University
45203
OrCad to ZofzPCB
OrCad - click on component, pin, net and see the corresponding place in ZofzPCB ZofzPCB
43463
New Ascent Verification
Interview with Graham Bell, VP Marketing at Real Intent Real Intent, Inc.
42754
Developer opportunities
In this video, recorded during Developer University at the 2013 International CES in Las Vegas, Nevada, Anupam Nath of Sony Mobile talks about developer opportunities with the Sony SmartWatch ecosystem. CES
42762
Kintex UltraScale 16.3G
Industry's first demonstration of a Kintex UltraScale device with 16.3 Gbps backplane performance capability. Xilinx
42743
2013 CES: LVCC N259 -
2013 CES: LVCC N259 - Reinventing TV Streaming CES
42750
2013 CES: Lowell McAdam,
Lowell McAdam, Chairman and CEO of Verizon, delivers a keynote address on the opening day of 2013 International CES. CES
43997
Xilinx and Open-Silicon
Watch a demonstration of the industry's first available 12.5 Gb/s Hybrid Memory Cube (HMC) interface using the Xilinx Virtex®-7 FPGA. See how this solution provides superior memory bandwidth for your application using HMC technology, Virtex-7 FPGA, and Open-Silicon IP. Open-Silicon, Inc.
42760
ARM Tech Con 2013 - Editor's
Editor's Teardown at ARM Tech Con 2013 ARM
45347
Designing a Multimedia
This video demonstrates the use of system-level architecture exploration for sizing and hardware-software partitioning. This is an example of the performance modeling using a set of standard IP blocks and a custom behavior flow diagram. Mirabilis Design Inc
42748
2013 CES: LVCC TV Connect
2013 CES: LVCC TV Connect at CES CES
44630
Samuel P. Sattel, Director
Sanjay Gangal interviews Samuel P. Sattel, Director of Technical Sales of Altium at 2015 DesignCon. Altium
42745
2013 CES: Keynote - The
The Next Generation of Innovators Keynote at the 2013 International CES CES
42752
2013 International CES
Samsung's President, Stephen Woo, delivers a Keynote Address at the 2013 international CES CES
45363
Architectural tricks
Unexplained Read/Write latency can be attributed to- cache hit-ratio, burst length, commands-in-a-row, AXI Bus arbitration, and video pipeline. During this Webinar, we will present the system-level modeling of complex video pipelines and their interface to memory using a Network of Buses. With this model, we shall optimize the address allocation to IP blocks, burst lengths and memory controller settings to get close to 98% efficiency. Mirabilis Design Inc
42744
2013 CES: LVCC The Human
2013 CES: LVCC The Human Body: The Next Digital Revolution CES
42757
Mobile Development and
In this video, recorded during Developer University at the 2013 International CES in Las Vegas, Nevada, Chris Beauchamp of Kii talks about mobile development and the cloud. CES
42751
2013 CES: LVCC Disruptive
2013 CES: LVCC Disruptive Technologies Impacting the Future of Games and Video CES
42747
2013 CES: Brand Matters
The Brand Matters keynote brought together executives from the world's top brands to discuss how technology and digital platforms are impacting marketing and brand strategy on a global scale. CES
43494
Industry's First DDR4
This demonstration showcases a DDR4 memory interface running at and above 2400 Mb/s with the Kintex UltraScale FPGA. The memory interface will demonstrate adequate operating margin while running under stressful conditions, ensuring robust operation in the presence of voltage, process or temperature variation. Xilinx
42759
IP Integrator Advanced
Learn about Vivado IP Integrator advanced user tips including: options for automatically zooming and making selections, searching for objects in a diagram, creating hierarchy, adding comments to a diagram, using layers and changing default colors on interfaces. For More Vivado Tutorials please visit: http://www.xilinx.com/training/vivado Xilinx
42746
2013 State of the CE
Consumer Electronics Association's President and CEO delivers the State of the CE Industry, followed by Mr. Kazuhiro Tsuga, President of Panasonic Corp., delivering the opening keynote of 2013 CES. CES
45351
Why do we need system-level
In this Video, we discuss the application of using system-level design efficiently to address the universal hardware resource limitation that leads to a high system interdependence. Mirabilis Design Inc
42895
Real Intent Achieves
Prakash Narain, President and CEO of Real Intent, speaks with Graham Bell about the accomplishments in the fiscal year 2013 ending on Oct. 31. He points to the growth of business by 60%, and to the market's need for the speed, capacity and low-noise reporting of the company's best-in-class solutions Real Intent, Inc.
42756
Scout for Apps - Embeddable
In this video, recorded during Developer University at the 2013 International CES in Las Vegas, Nevada, Laura Della Torre of Telenav talks about Scout for Apps, which enables embeddable mobile GPS navigation. CES
42755
Differentiate your applications
In this video, recorded during Developer University at the 2013 International CES in Las Vegas, Nevada, Craig Hurst of Intel talks about how to differentiate your applications and deliver breathtaking visual user experiences fast, simple and free. Intel
43108
SSD & Memory: Why It
Did you know there are more connected devices than people in the world?
Watch the video for more interesting facts and information!
Updated version of the Dell World Presentation by Samsung's Steve Weinger, Director of Strategic Marketing - SSDs and Sylvie Kadivar, Sr. Director of Strategic Marketing.
Samsung Semiconductor
43998
High-Speed Serial Link:
Passive channels pose significant challenges to serial link transmission for single-ended buses running at very high speeds. With the combined increase in data rates and routing density, crosstalk has become a major source of noise in current PCB designs. Reduced bit-to-bit, bytelane-to-bytelane and channel-to-channel spacing makes timing/voltage active margin analysis more challenging especially for single-ended and bidirectional buses. For this reason simulating a full pad-to-pad link is becoming increasingly desirable. Being able to quickly identify worst case lanes and quantify crosstalk impact is crucial. Such an approach is still very challenging especially for complex systems where the location and nature of aggressor signals change when moving from one component (package, board and connector) to the next. CST - Computer Simulation Technology
42960
How to know when a formal
OSKI Technology
43491
GPUs, Warping Engine
Learn more: http://bit.ly/1glWAjN
The demo shows typical GPU graphics use cases and capabilities in combination with a subsequent warping-transformation of the GPU output image. Warping can be used e.g. for head up displays or for camera lens corrections.
Altera
43492
Low Cost Top View IP
Learn more: http://bit.ly/1etCtw1
This system takes two high resolution inputs with fisheye lenses, performs distortion correction on the images, and a perspective transform. The resulting imagery is presented to the ARM for machine vision processing -- and outputs via Ethernet or SDI.
Altera
43535
Xilinx and Huawei Discuss
In this live presentation at OFC 2014, Huawei and Xilinx discuss how they are working together to solve the challenges associated with 400GE network readiness. This presentation also discusses the key technologies in 400GE and how programmable technology is playing a key role to expedite the development and deployment of Huawei's future IP router products in the networking infrastructure. Xilinx
42829
CES 2014 - The Connected Car
Join Intel as we discuss the connected car, recorded at CES 2014. Intel
43083
Reducing EMI in SerDes
Learn what spread spectrum clocking (SSC) is and why it is important to high-speed SerDes design. Synopsys
45601
Point Cloud Demo with
https://www.e-consystems.com/USB-3-stereo-vision-camera.asp
point cloud demo with tara - 3D stereo camera in OpenCV.
e-con Systems
42958
How to achieve early
OSKI Technology
45459
How to create innovative
In this Video, we will get you started on using VisualSim Architect to conduct performance analysis, power measurement and functional validation. You will learn advanced concepts of system modeling and how to apply VisualSim Architect for a variety of applications. Highlights include the application for both System-on-Chip and Large Systems including Designing memory interfaces using DDR3 and LPDDR3. VisualSim Architect is used by systems and semiconductor companies to validate and analyze the specification of the product. The environment offers an easy-to-use methodology, huge library of technology components, extremely fast simulator and a huge reports list. Mirabilis Design Inc
42959
How to formally verify
OSKI Technology
43189
O'Reilly Webcast: Using
Join Ray Wilson, author of "Make: Analog Synthesizers - A modern approach to old-school synthesis" for a hands-on webcast where he will present and discuss several synthesizer related applications for the TL07X series of Texas Instruments op amp. Don't miss this informative presentation!

This webcast will cover:

Gaining up a weak signal:

Inverting gain
Non-inverting gain

Input coupling
Output coupling
Mixing Signals
AC Input Mixer
DC Input Mixer

Affecting a wave-shape
Active - Precision Full Wave Rectifier
Fuzz Tone
Pulse Width Modulation

Comparators
Non-inverting
Inverting
Adding Hysteresis
Window Comparators

Active Filters
Low, Band, and High Pass Filters
Online Tools You Should Know About

About Ray Willson

Ray has been interested in analog synthesizers since the first time he heard "Switched On Bach" back in 1968. That magic box on the cover of the album with all of the knobs, switches and patch cords grabbed his attention and never let it go. After working at U.S. Steel, Intec Systems, Siemens Pacesetter, and Telectronics, and too many software companies to count he now runs his popular web site Music From Outer Space full-time. Most of his electronics learning has been hard won and experiential with hundreds of hours devoted to reading, bread-boarding, experimenting and appreciating analog synthesis.

Produced by: Yasmina Greco
O'Reilly
45518
Paripath Technology
http://www.paripath.com

Paripath enables customers squeeze every pico-second of performance and every milli-watt of power by efficiently providing sign-off accurate models.
Paripath Inc
45547
ZofzPCB Cross-Section feature
Place mouse in desired cut point, press DEL key.
Keep DEL key pressed and move the mouse.
Alternatively, use a measurement marker for 2 point cut line definition.
ZofzPCB
43175
DesignCon: New Ascent
Interview with Graham Bell, VP Marketing at real Intent Real Intent, Inc.
111251
People distance measurement
People's distance measurement with Tara - stereo vision USB 3.0 camera in OpenCV. https://www.e-consystems.com/3D-USB-stereo-camera.asp e-con Systems
42961
How to know when a formal
OSKI Technology
95284
5MP AutoFocus HD UVC
http://www.e-consystems.com/5mp-usb-cameraboard.asp - 5MP AutoFocus HD UVC USB Board Camera based on OV5640 CMOS sensor from OmniVision Inc.
USB Camera Board is fully compliant with USB Video Class (UVC) 1.0 Standard, the USB Audio Class 1.0 Standard. So video streaming through UVC and audio streaming through UAC is possible without any special drivers on Operating Systems that have built-in support for these UVC and UAC standards.
Built-in Microphone with 16 bit PCM support and 2 User Configurable General Purpose pins(1 Input and 1 Output) 1 Predefined General Purpose input for Still Image Capture and 1 Predefined General Purpose input for Flip/Mirror
e-con Systems
37332
Shawn McCloud, Vice President
Calypto
39370
Computing Waveform FFTs
Screencast of how to compute and display the FFT of waveforms displayed in Triad Semiconductor's ViaDesigner EDA software. Triad Semiconductor
40089
Be a Supermodel-ler:
This video shows you how to use an automated curve tracing tool to create custom VHDL-AMS simulation models. Triad Semiconductor
37359
Karl Kaiser, VP of Engineering
Esencia
39063
Cymbet EnerChip Solid
Cymbet EnerChip™ thin film rechargeable solid-state smart batteries (SSB) are an innovation in energy storage and power management. Packaged as a Surface Mount Technology (SMT) component, the EnerChip provides energy storage in a form factor and with a convenience not previously attainable using conventional solutions such as lithium coin cells or super capacitors. Cymbet

CST Webinar Series
Verific: SystemVerilog & VHDL Parsers
TrueCircuits: IoTPLL



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