Universities -> Design Automation Vendor University Programs
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| Views | | 911EDA | Altium Designer Training Course | 0 | | Aldec World-Wide University Program | Aldec is pleased to offer several options for Universities and students looking for excellent design entry and simulation tools at significantly reduced prices. Aldec’s University program has now been available for several years and has developed a strong following. Due to this high popularity, Aldec decided to expand on its success and offer more options to all current and future designers of HDL at the University level. | 2 | | Cadence University Partner Program | The Cadence University Partner Program (UPP) allows universities all over the world to access Cadence technology and support for educational purposes. The program encompasses university-related activities such as software access, professor training, support, curriculum development, internships, scholarships, new college graduate development, industry relations and research programs.
By driving the adoption of technologies and methodologies by universities, Cadence works to increase the capabilities of the next generation of engineers in advanced electronic design and thereby continue to create new and long-term economic value for the electronic industry.
http://crete.cadence.com for Curriculum development. | 8 | | ChipEstimate.com University Program | Professors and their students are welcome to download a free version of the InCyte chip estimation tool at www.ChipEstimate.com for use in their curriculum. InCyte allows users to understand the factors that go into total chip cost, size, yield, power consumption, and leakage by providing fast and accurate chip estimations to within 5 to 10 percent of silicon. Please contact Giga Scale IC for more information and examples of how universities are incorporating InCyte into their coursework. | 16 | | DOEACC CENTRE CALICUT (Govt.of India) | Certificate Program in Embedded Hardware Modeling using Verilog HDL
(Duration : 7 Days)
Objective of the Course:
The main objective of this course is to acquaint participants with Digital System & RTL design fundamentals and provide them with practical knowledge about the methodology and EDA tools used for these designs. This course may also help participants to implement relevant concepts for their research & academic projects
Outcome of the Course:
The participants will learn how to do RTL design of Hardware Building Blocks and perform verification using the powerful Verilog HDL.
Eligibility
Engineering (Degree or Diploma) OR Science Degree which includes a basic course in Digital Electronics. Students of such programs, who have taken a basic course in Digital Electronics may also apply | 1 | | Intellitech DFT / JTAG University Program | The Intellitech DFT / JTAG University Program's goal is to educate the next generation of electronic design engineers in design-for-test and scan-based diagnostic equipment. Intellitech will provide diagnostic and test equipment to universities that have curriculum for DFT (Design-for-Test) of digital/analog. Engineering students will benefit through the use of state-of-the-art diagnostic and test equipment currently used in the industry. | 36 | | Xilinx University Program | The Xilinx University Program (XUP) was established in 1985 to promote education and research using Xilinx Programmable Logic Device (PLD) technologies. Today, with 57% worldwide market share in the commercial FPGA (Field Programmable Gate Array) market, Xilinx is also the most widely used PLD vendor in the academic market. We support well over 1,600 universities worldwide with state-of-the-art PLD products and services. If you are an educator at the college or university level, we strongly encourage you to participate with Xilinx. | 2 |
Total 7 links listed (include in sub-categories).
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