|
This article presents an overview of a C-based design flow that enables designers to generate high-quality hardware for video algorithms. Algorithmic C synthesis is used to generate optimized RTL from algorithmic specification written in pure ANSI C++. A wide range of micro-architectures for ASIC and FPGA target technologies can be generated from the same source by interactively setting directives during synthesis
|
|
|||||||||||||||||||||||||||
|
||||||||||||||||||||||||||||
|
||||||||||||||||||||||||||||
