"ViXS 3290 Video Chip Demo", Gilles Pirio Virage Logic

"Sign-off Metrics for IP Quality", Mike Gianfagna Atrenta

"Breakthrough ZEBU Server", Ron Burns EVE

"New SOC FPGA Debug", Dave Orecchio GateRocket

	Gabe Moretti EDA Weekly Static Timing Analysis Is Not Staying Static Static timing analysis (STA) has been around more than 30 years. However, in the last fifteen years its importance has grown to …
Archived Weeklys

	Mark Gilbert Careers Corner A Must Read for Companies and Candidates…”My thoughts on BOTH sides of INTERVIEWING”… DVCON, the HOT LITTLE Show!
Archived Carrers Corner

	Dr. Russ Henke EDA & IP Commentary Electronics IP Industry – A February 2010 Update
Archived Commentary

Director, Corporate Training and Quality for Atrenta at San Jose, CA

Senior Design Engineer for Intel at Bangalore, India

Senior Engineering Manager for Xilinx India technolgy Services Pvt. Ltd. at Hyderabad, India

Corporate Controller for Actel Corporation at Mountain View, CA

Customer Service Account Representative for Actel Corporation at Nashua, NH

DA Engineer for Intel at Haifa, Israel

Electronica & ProductronicaChina 2010 at Shanghai New International Expo Centre SNIEC Shanghai China - Mar 16 - 18, 2010

China Semiconductor Technology International Conference 2010 at Plaza Royale Oriental Shanghai Shanghai China - Mar 18 - 19, 2010