Soha Hassoun, Design Community Chair User Track at DAC 2009

Vlad Marchuk POLYTEDA at DATE

Tobias Bjerregaard Teklatech

	Jack Horgan EDA Weekly Autosar and VSA from Mentor Graphics Here again we have a case where the presence or absence of a standard can help or hinder the creation …
Archived Weeklys

	Mark Gilbert Careers Corner You might be surprised to learn who must actually supply the EDA-DAC STIMULUS PACKAGE…
Archived Carrers Corner

	Dr. Russ Henke & Dr. Jack Horgan EDA & IP Commentary EDA Industry Update JUNE 2009 -- What did the Last Quarter Bring?
Archived Commentary

R&D Engineer, Product Development for Gradient Design Automation at Santa Clara, CA

Senior Systems Software Engineer for Sun Microsystems at Menlo Park, CA

Sr. Software Engineer - Place & Route (Routing, Timing & Optimization) for Mentor Graphics Corporation at San Jose, CA

Lead Development Sepcialist / Functional Verification - French Language for Mentor Graphics Corporation at Wilsonville, OR

Lead Development Specialist / PCB - German Language for Mentor Graphics Corporation at Wilsonville, OR

Principal Engineer - Place & Route for Mentor Graphics Corporation at San Jose, CA

Processor Design: System-On-Chip Computing for ASICs and FPGAs.

Microelectronic Circuits (Oxford Series in Electrical Engineering), by Adel S. Sedra, Kenneth C. Smith.

SEMICON West 2009 at Moscone Center San Francisco CA - Jul 14 - 16, 2009

Library Management with Altium Designer at Premier EDA Solutions Ltd. Stanstead Abbotts Ware Hertfordshire United Kingdom - Jul 14, 2009

Identify® RTL Debugger

Verilogger Pro Animated Tutorial

Fusion Design Flow Tutorial