November 30, 2009
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| by Jack Horgan - Contributing Editor
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We learn very early in life through the story of the little boy who cried wolf that credibility is important. Personal credibility is not something you are born with. It can not be inherited or bought. It must be earned. As someone once said, credibility is like virginity, once lost it can not be regained. The same is true with the credibility of a firm. There are exceptions like the Japanese car companies whose early products in the US had a poor reputation.
EDA firms in particular need credibility. Despite being involved in leading edge products, the consumers of EDA products are generally conservative. Due to the fast pace of technology and short windows of market opportunity, EDA customers have very tight and short schedules for product development. They do not have the luxury of trying out a new way of doing something. The risk of missing the proverbial market window is large under the best of circumstances and the penalty for falling short is great for all involved. The tendency is to stick with proven methodologies and tools until the pain becomes too great, i.e. when the ability of those methodologies and tools to deliver product
with required QoR within time and dollar budgets fails. To change to a new tool much less a new methodology requires a large leap of faith. There is no real option to carry out two parallel developments. Benchmarks can only go so far in reducing the uncertainty and in many instances require considerable time and resource to carry out.
I had an opportunity to discuss this topic among other things with John Sanguinetti, founder and now CTO of Forte.
I like to start out by asking for a brief background.
I am not originally an EE. In school I was in Computer Science. I was interested in operating systems and analysis of software systems. I ended up working for a couple of computer manufacturers, Digital Equipment and Amdahl and then a succession of smaller companies making hardware; ELXSI, Ardent and NeXT. Then I started Chronologic Simulation which was the company that developed VCS (Verilog Compiled Simulator). That was my foray into EDA. I had actually been doing design verification at two companies before that. I was really a practicing design verification engineer before I started Chronologic. I made that product for myself. I was the target customer. That made market research
really easy. I was always convinced that this was one of the reasons the company and the product was successful. Since then, Chronologic was sold to ViewLogic and eventually was acquired by Synopsys. VCS is still very much in the market. I then started the company Forte Design System. Its predecessor was CynApps. We started that in 1998 and merged with Chronology in 2001 to form Forte. We have been prgoressing ever since, slogging it out. I was the CEO of the company when it was founded but now and for some time I am the CTO.
I recently interviewed a gentleman that had been CTO of several companies. Often the scenario is the one here. After some time the investors suggest that the founding CEO, typically a technical guy, be replaced by an experienced CEO with a more marketing and sales background.
We went through that process. When we got the second round of funding, the lead investor made it very clear that he expected that we would get "professional management" in the very near future. We did. We hired a CEO. Since then we hired another CEO. A year later he left and we promoted our VP of Engineering to CEO. That was far more successful than our previous attempts. EDA is a different industry. You can not just bring someone in from the outside and expect them to lead a company, an EDA company, particularly a small, single product EDA company. I’ve always been convinced that this industry is about credibility. If you do not have it, there is nothing you can do to influence
your customers or your employees. It is very easy to lose credibility, just say something stupid. I am convinced that it is important for the CEO to be a real technical person, not necessarily a heavyweight, but somebody who really fundamentally understands the technology of the company and the products you are trying to produce and sell. You are trying to convince customers that this is something they should take a risk on. If you can not do that, if you can not speak knowledgeably, communicate your vision to people to buy this thing, you are just not going to be successful. I think we have seen that in this industry over and over. It’s important to people outside the company but it
is also important to people inside the company. You bring someone in from the outside and he’s a financial guy, he says you should do this and this and this. They want it. That’s not what our vision was. We started the company to do this and this is what the technology is supposed to do. But he wants to do that. It does not match very well. He can not take the company in the direction he wants. That’s my riff on credibility. It is fundamental to this industry.
There is the example of Scully at Apple.
That’s an example but computer makers are a little different form EDA. They can get away with someone not quite as technical leading an Apple.
Or an IBM.
Or an IBM. The first startup I joined was a company called Ardent Computer. The guy who was CEO of that company was not a technical guy, he was a salesman, a management guy. But people did not expect him to know the details of the technology we were making. It was a reasonably large company, lots of moving parts. EDA companies, particularly EDA startups, typically have one or two moving parts. You have to understand those.
Will you tell me a little bit about Forte? What is Forte’s vision?
Our vision is really very consistent from when we started the company in 1998, high level design and high level synthesis to support it. We were convinced eleven years ago that hardware design would move up a level of abstraction. It was the time to do that. There were alternative ways of doing it but we decided to use C++ as the design language to make a synthesis product that could take a design in a higher level language like C++ or some variant of that which would produce RTL and would go into the standard design flow. That was the vision. It is still the vision. It has taken a long time to realize it. In the intervening years we have gone through a number of variations of trying
to produce other products to support this higher level design environment. We have basically pared all of that stuff away now. It is just a synthesis product now called Cynthesizer. We put all of our effort into that. Its purpose is to take high level design input in SystemC and to produce Verilog RTL as output that will go into the standard design flow and produce good working silicon. So, that’s what we do. We have been shipping that product since 2002. It’s matured a great deal in the last seven years. That’s our vision. As we get more successful, we may add things to it, probably in the realm of IP. I do not see us adding other products to it necessarily and certainly
not anything that is not very related to high level synthesis.
You have a vision that you can explain to investors and to the CEOs and CFOs of companies that you wish to sell to. So how come Forte is not one of the Big Three?
It has taken a long time for the product to mature to the point where it realizes the vision. When we started the company I made the analogy that RTL was the assembly language of hardware design. We just needed to move up the comparable level of abstraction which was then in SystemC or something similar. That was something like the FORTRAN of the 1960s. Compiler technology has advanced a great deal in the 50 years it has been around. That is what we started with, a vectorizing, parallelizing compiler that we had the rights to from Ardent Computer where I had worked in the eighties. That was the starting point for synthesis. As it turns out there is very little of the original code
left. It is a very hard problem. We clearly underestimated how hard it was. If I had known how hard it was, I doubt that I would have gotten it funded. I doubt that I would have the enthusiasm to do the company in the first place. The reality is that today there are over 20 products that have chips in them that were done by Cynthesiszer. These are products that you can buy at BestBuy. There have been over 100 tapeouts. There are over 500 users. It is in regular use now, very successful. There are really dramatic success stories over the past year or so. It is not widely known. This technology is still viewed with some suspicion by most of the market. People are skeptical that it can
support the claims we have made for it. We are fairly comfortable now that we have enough experience that we can back up the claims.
How do you handle the skepticism?
The only way you handle it in this industry is by demonstration and by customer reference. You go to a customer and they say “Who else is using it?” You say “The guy down the street is using it.” If the guy down the street is across the Pacific, it has much less impact on this side of the Pacific than it does over there. Most of our business is actually in Japan. That is where our original customers were. Because of word of mouth, we have quite a number of Japanese customers. That did not translate over to the US. The Japanese customers don’t really talk abut their experiences and it is much harder to get them to write about it. In the US the way we will
establish our presence here is the same way. We will get a customer to be successful, reference that customer to the next guy and it will go on from there.
If your company had developed a SPICE simulator that ran 10x faster than current competition, it would be fairly easy to demonstrate. Take a SPICE deck, run it and compare the output. With your product how much time and effort does it take you to convince the prospect that the product does what you claim.
That’s a big problem. You go to a customer and say “You should really not write your design at the Verilog RTL level. You should be wiring at a higher level in SystemC.” They say “I don’t have SystemC code. I can not test yours out. I do not trust you to give me some SystemC code and run your product on it. I know it is going to work. You are not going to show me something that doesn’t work.” The evaluation process can be very long. Typically, what happens is a customer with no SystemC code to start with will take a fairly small piece of RTL that they have already done in Verilog and rewrite it in SystemC, synthesize that and see if they get
the same result as when they did it by hand. That is a kind of okay experiment. But it does not expose the real difficulties of higher level synthesis because they do just one block. The problem comes when you do multiple blocks that have to talk to each other. In particular, the choice of language. Right now you have several vendors out there saying that they will synthesize from C instead of SystemC. We do it from SystemC because you can represent those interfaces. With C you can not. If you just do one block, it is irrelevant. You do not see the difference between the two approaches. It’s a problem. It is one of the things we identified early on. We said we are going to use make
this synthesizer product but if there is no SystemC code to synthesize, then we are not going to have any market, and we are not going to be able to sell any. So, actually in the early days of the company, we spent considerable effort creating this SystemC environment. It was not SystemC then, it was called Cynlib. We tried to create a design ecosystem so you could actually do design in SystemC. Fortunately, a lot of other people started doing that. That is why we stopped those efforts because you had CoWare and Synopsys and a whole bunch of smaller people coming out with products supporting modeling activities in SystemC. Now there is a lot of SystemC code that is used for architectural
modeling, not so much for implementation, but these models can be turned into implementation models without too much difficulty. We sometimes see now, in fact fairly often, in evaluations that a company has a body of SystemC code and they can take some of that and use it as a test case.
Who do you see as Forte’s competition?
Mentor is our primary competition and has been for the last couple of years. They use C as the input language and we use SystemC. That is a big differentiating factor. We tend to be stronger in companies that are producing ASICs where as Mentor tends to be stronger with companies producing FPGAs. FPGAs often have a smaller number of blocks in the design. So the interactions are not so important, the interfaces are not so important. They have been the primary competitor the last two years. Cadence has announced a product CtoS which is much more aligned philosophically to us. They are taking the same approach. Their product is just now getting to market. It really has not been
competition yet but we expect that it will be because they took the right approach.
How big a firm is Forte?
We are about 30 people. We’re kind of a geographically dispersed company. We have people in a lot of different places. Our engineering is done in three or four places. The bulk is in Pittsburg. Some of it is in Redmond, Washington. We have people in Texas and Massachusetts and also in France, Japan and Korea.
How about Forte’s revenue stream?
We do not divulge our revenue but we were up 155% in 2008 over 2007. We will be up a little bit more than that in 2009. We have survived the downturn pretty well.
Are your sales direct or through distributors?
Direct. We do not have distributors. We have sales offices in Shin-Yokohama and Seoul. We have a direct sales team in France. Our VP of Sales is in Boston.
Have there been any recent product announcements?
We had a new release in May, labeled 3.6. That had a significant new feature. It is called Interface Generation. It is a means of generating code that will do fairly sophisticated interfacing things like line buffers. If you need to take a stream of data and operate on it in some organized fashion like a 5x5 matrix where every cycle a new pixel comes to replace one of the pixels in the matrix, the algorithm written in C is really very straight forward, a double loop. But if you write in RTL, it is pretty complicated because you do not stick the whole frame in memory and operate on it. You have to stream it in. Getting that streaming right using a minimum amount of storage is a
difficult one. It is a tedious problem. It is one we can automate. That is the feature we have added but overall the significance of new releases is really product maturity.
Over the next year to year and a half, do you see anything new on the horizon?
I think the big issue that we have heard a lot about from people like Gary Smith and a lot of people who comment in this area is the difference between doing control dominated design and data path dominated design. We have been handling control dominated design for a long time, at least a couple of years basically as a result of the demand from our customers. That has really come to fruition over the last year or so. You can do something that looks like traditional control dominated design with our Cynthesizer without any real difficulty. Over the next year to two years, there is really going to be more optimization of all of those capabilities. It is kind of like Design Complier. If
you compare Design Compiler from 1992 to 1998, what did they add? They added thousands of little things but not one big thing. That is the way this has gone. One thing we might see but we do not have any specific plans to do this, is that if we get the opportunity we will develop IP at a higher level. At this point we have fixed point classes, floating point classes and some interface classes that are relatively robust and pretty useful. We will probably see more of that sort of thing. We have an AMBA bus interface. You will see more of these interfaces that we can provide to the customer in SystemC at a higher level that can be synthesized and that they can use in their designs. I would
Having worked for a Japanese company I am sympathetic that you have had difficulty getting Japanese customers to endorse the product.
If you go by our booth, you will see one wall with quotes from Japanese customers. We have gotten endorsement at least at the level when they say nice things about us. What really counts is an engineer writing a white paper or writing to Cooley that these are all the things I did. These are the characteristics of the design and this is how the tool works. For a lot of reasons Japanese engineers are not going to do that. Part of it is that they would be working in a second language. You can not expect a guy who speaks primarily Japanese to write a paper in English
You can translate the success stories from Japanese to English. When I worked for the Japanese company we did that that they essentially said we are using the product and look forward to the next release.
We have seen that. It is always a challenge to get people to write things that endorse you. But we just have to do it.
From a development point of view it sounds like putting one foot in front of the other, leveraging what you have already done.
It is not like we have some new algorithm that we are working on that is going to change the world. One of the things we have learned in this whole process is that the fundamental algorithms down in the heart of the synthesis are not really all that important. It is basically resource allocation. There are a number of academic publications on optimization algorithms. They are all heuristic. There is no single algorithm that will give you an optimal result for every design. Academics think that the whole issue is optimization. We found out that your algorithm can be +/- 20% but it is all the other stuff that really counts. Can you handle memories? What kind of interfaces can you
handle? Can you implement a pipeline? It just goes on and on. These things have nothing to do with the fundamental optimization techniques that are at the heart of the synthesis process. So it is really a matter of trying to put one foot in front of the other.
When we delivered the product to our first customer, Sony, and we got through a project, they came back and said these are all the things we had problems with. If you want us to use this for another project, you need to fix these. We started to fix them. After another project, they said here are some more things. After one and a half to two years, they said now that we have a lot of experience, here is the universe of our designs. You guys are useful in this section. If you do this and this, we can do this section. We started working on that. One and half years later they came back and said “You’ve done all that stuff, now we can do all of our designs.” We have been
in that state with them for about two years now. Other companies have other requirements. Sony has a pretty stylized way of doing designs, pretty standard. You get to Toshiba and Canon or some other people, there are other features or requirements. We just have to work on them one by one. These are not the fundamentals of the synthesis process. They are sort of on the periphery but if you can not do those, they can not use your product.
Anything else to add?
No. I enjoyed speaking with you today.
Since this interview Fotre acquired Arithmatica, Ltd., provider of IP and datapath synthesis based in the United Kingdom, to expand its product offerings and accelerate product development.
Terms of the acquisition were not disclosed.
Forte will continue to develop and market Arithmatica's CellMath(tm) products, including direct support for CellMath Designer(tm) (CMD) and support for CellMath Optimizer(tm) (CMO) through its relationship with Imagination Technologies. It will integrate Arithmatica's patented technology and IP into its Cynthesizer(tm) SystemC
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-- Jack Horgan, EDACafe.com Contributing Editor.
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- reviewer November 30, 2009
Reviewed by 'Mr. reviewer'
anyone ever bother to proof read your article?
2 of 4 found this review helpful.