September 15, 2008
EDA: The Promise & The Challenge
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| by Peggy Aycinena - Contributing Editor
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There’s so much promise in electronic technology. And, as the news of the past several weeks clearly indicates, there are so many global challenges awaiting further delivery on that promise:
* Tracking destructive weather patterns; better modeling to predict the weather patterns in the first place.
* Developing sleek mass transit to serve the world’s increasingly urbanized populations; massively smarter control systems to regulate the transit systems already in place, and help prevent human error.
* Uncovering and implementing novel energy sources to replace today’s toxic carbon-based infrastructure; increased efficiencies in utilizing existing energy sources, in the meanwhile.
* Predicting disease and preventing destructive congenital conditions; customized pharmaceuticals and delivery systems attuned to the unique physiology of each individual.
* Better distribution of educational resources to fully utilize the intellectual capital vested in humanity; connecting the world to optimize commerce, communication, and understanding across cultures.
* All of this, and entertainment too.
If you were on the ground in Silicon Valley last week, you would have heard the EDA industry is poised to continue to help convert all of this promise into reality. You would also have heard that it’s happening because electronic design automation is simultaneously moving to higher levels of abstraction, while also developing closer ties to manufacturing.
Tallo: ESL has landed …
Intel’s Ken Tallo is the newly elected Chair of OSCI, the Open SystemC Initiative, succeeding ST’s Alain Clouard. With his OSCI hat on, Tallo told me by phone last week that OSCI continues to maintain its momentum by establishing and deploying standards and methodologies around SystemC, and by reaching out for additional membership from “tech-driven market segments.”
He said OSCI will become “increasingly influential and impactful” as the use of SystemC extends beyond EDA to additional software companies – bios and OS and embedded firmware vendors – plus the auto, aero, and medical industries, and any companies producing and building “complex platforms or systems that have started to embrace System C. We need participation and influence from all of these companies,” Tallo said.
Tallo’s not new to OSCI; “I’ve been repping on the board for Intel, but now as Chair, I want to continue momentum that’s already established with TLM 2.0 and recent announcements around the AMS extensions to the standard. OSCI needs to keep releasing specs and creating standards that the industry can rally behind and continue to propel that image forward. We have over 52,000 registered users, while the number of downloads of the reference manual and TLM 2.0 specs over the last 3 months has been incredible.
“We want to become part of the elite group of organizations – groups like Accellera and SPIRIT – that survive in the long term. As long as we execute well and deliver what the industry finds value in, we’ll become even more influential based on the quality of our results.”
Meanwhile, with his Intel hat on, Tallo said SystemC and system-level design have arrived: “I was on a panel about ESL at DAC several years ago, where we made predictions then that in the next couple of years system-level design would be in the forefront. Now that time has arrived, even though many in the industry continue to use 10-year-old design methods – synthesizing Verilog to gates.
“I personally lived through that whole transition when Verilog came along. There were lots of engineers then who absolutely did not want to let go, saying they could synthesize faster than any tools. Where are those guys now? Out of the market. The same thing’s happening now.
“It’s true [the speed of adoption of system-level design] will depend on having the EDA infrastructure in place to support it, but that’s coming. The EDA companies are on the board of OSCI. They’re now focusing on solving the challenges of designing complex SoCs where the difficulties, particularly in manufacturing, are immense.
“It’s a transition that’s taking place even as we speak, and the industry is looking at all of this and knows that if we can’t put enough logic and functionality onto the real estate, the industry will stall. No matter what the naysayers out there say, this will be the big focus area going forward. A recent survey at DAC said that 70 percent of SystemC users today are actually synthesizing pieces of the design – they’re seeing the value of taking high-level models and synthesizing down to gates.
“The [transition] is also driven by universities as they’re being forced to make the shift, as they start to embrace SystemC in their mainstream courses. We’re going to see things quickly evolve in the next year or two, as higher levels of abstraction definitely emerge.
“I manage the virtual platforms group inside of Intel, and also manage external IP for the company. We’re making the requirement today at Intel that all IP must come in with ESL models, so we can create our products faster, bigger, and better. It’s not just buzz anymore – it’s where we are.”
Rhines: The best days are still ahead …
There are three things that distinguish a keynote from Mentor Graphics CEO Wally Rhines: a) he starts and ends on time; b) if he says he’ll be there, he’ll be there; and c) his presentations are so rich in facts and figures, you never, ever leave without having learned something new. Such was the case once again last week, when Rhines delivered a knock-their-socks off, content-rich keynote to the assembled masses at EDA Tech Forum last Thursday in Santa Clara.
He started with a review of what everybody says is wrong, mature, stale, or dead-in-the water about EDA. By the time he was done 45 minutes later, however, Rhines had managed to turn the tables on the industry naysayers, articulated a host of reasons why the industry is nowhere near becalmed, and ended with a rousing, “The best days in this industry are still ahead!”
In between, he invoked Russian economist, Nikolai Kondratiev, who suggested economies are characterized by 50-year cycles that include innovation, robust commercialization, and subsequent economic slow-down as the implementation of that innovation ages and matures. Rhines said steel, chemical, and automobiles display cycles which confirm Kondratiev’s theory, and noted the industrial revolution of the 1850’s, the combustion engine in 1900, the transistor, laser, and jet engine of the mid-20th century also reflect “Kondratiev-ian” cycles. If Kondratiev is right, Rhines said, we’re now headed once again into an economic “winter”
whereby the financial benefits of innovation today will not be available until our children’s generation comes of age.
But, Kondratiev is not right this time, Rhines said – this time things are different, and here’s why: In China, the middle class will grow from 30 percent of the population today, to 50 percent by 2020. In India, the percentage of the population that’s middle class today will increase tenfold by 2025. In geographies such as Russia, Central and Eastern Europe, and Latin America, we’ll also see dramatic increases in the number of people with middle class earnings and discretionary income. Those changes will translate into hundreds of millions of cell phones being purchased, computers, televisions, and a host of other products; the growth
in non-U.S. consumer markets is one of two reasons why Kondratiev is not right this time, per Rhines.
The other reason is consolidation in the industry. Despite predictions of doom for 45 and 32 nanometers, Rhines had charts and graphs to suggest that the ramp-up for these newer process nodes is equivalent to the ramp-ups we observed in previous years for 90 and 65 nanometers. The demand is there, albeit harder to accomplish these geometries, and the designers are stepping up to the challenge with better tools, more connectivity between geographically dispersed design teams across consolidated corporate entities, and the move to more programmable devices, FGPAs.
Rhines embellished Metcalf’s Law: “The value of a telecomm network is equal to the square of the number of users.” He added Wally’s Corollary: “The magnitude of the innovation is proportional to the square of the number of innovators in the Internet age.”
The number of people now doing design with programmable devices in the presence of a worldwide community of design peers means, “We’ve increased the number of innovators and dramatically increased the base. And, because they’re new entrants, they’re more culturally aware and better risk takers,” Rhines said.
Hence, the market for design tools and opportunities for innovation in electronics and semiconductor-based products is nowhere near the end. There are 500,000 designers worldwide today, per Rhines’ definition. Extrapolating forward, he said we can expect to see 5 million designers hard at work by 2030.
“Has the market reached maturity?” Rhines asked his audience, and answered his own question: “There are more than 200 companies in China alone developing cell phones, drivers, protocols, and differentiated products to meet various geographic niches!”
As always when Rhines is at the podium, it’s hard to avoid the contagion of his enthusiasm for the future. He said between the need for earlier architectural exploration of product specifications, better verification of increasingly complex systems, ferocious demand for more robust, low-power devices, the pursuit of reduced manufacturing variability despite increased analog and mixed-signal content on-chip, and emerging markets with an appetite for regionally differentiated features – not to mention the drive to higher levels of abstraction and system-level optimization – it’s patently clear that
for the semiconductor and electronics industries, and the EDA industry in particular, the best days are indeed still ahead.
Rabaey: Immersion computing …
U.C. Berkeley’s Jan Rabaey spoke at CDNLive in Silicon Valley last Tuesday morning. He predicted that someday every individual on the planet will be connected to the rest of the human “network” by 1000 radios, or more. Immersed in data, we will constitute a massive “societal IT system … a complex collection of sensors, controllers, computer and storage nodes, and actuators that work together to improve our daily lives.”
To achieve this Nirvana of connectivity, Rabaey said we’ll need a highly beefed-up infrastructional core, seamless mobile access everywhere and anywhere, and sensory swarms – this last thing being a good thing, not a bad thing like swarms of mosquitoes, bees, or yellowjackets.
The infrastructional challenge, per Rabaey, is defined by its appetite for storage, computing, and fast networking – and the requisite power needed to drive it all. The mobility challenge requires an extension of today’s ubiquitous cell phone, which Rabaey said will soon emerge as everybody’s “personal communication and computation device of choice.” He said this level of mobility will come to fruition based on yesterday and today’s work in low-power design, and tomorrow’s research into multi-core platforms.
Finally, Rabaey said that, although a “true immersion architecture is still out of reach,” buckle your seatbelts because the ride’s about to get really exciting. Reprising his extensive talk last June at DAC’08, Rabaey said the most sci-fi part of his vision will ultimately materialize when we’ve got brain and neurological links into the human/electronic uber-grid. Rabaey noted that humans constitute 10-to-15 percent of the biomass, as do ants, but ants are less complex, more redundant, and more resilient than humans.
Happily, Rabaey concluded, “humans are not a bad system either”, we’re just not as well synced as the ants. But, with further integration, multi-cores, nanotechnology, packaging breakthroughs and more low power, we’ll be in better sync soon – if Rabaey and Alberto Sangionvanni-Vincentelli, who Rabaey frequently referenced in his talk – have anything to say about it. Total immersion computing will need complex, reliable, heterogeneous systems, but we’ll only get there by designing to system-level metrics – some of which we may not yet even understand.
It’s system-level to the rescue – so think “outside the box,” Rabaey told his audience.
Blyler: Green power …
Chip Design Executive Editor John Blyer moderated an hour-long panel, also last Tuesday, at a by-invitation-only Press lunch in San Jose. Cisco sent Nikhil Jayaram, IBM sent Juan Antonio Caballo, Cal Berkeley sent Jan Rabaey, Cadence sent Ted Vucurevich, and the Silicon Valley Leadership Group sent Carl Guardino to populate the panel. They all had pretty rational things to say.
Caballo said IBM’s busy partnering with well over 100 different entities to figure out how the world can get more green. He said there’s lots of low-hanging fruit when it comes to applying adaptive-systems strategies to help power companies with their load balancing, and IBM consulting services are hard at work helping to pluck that fruit.
Rabaey said it’s all about getting information out to the users and letting folks know how expensive their power is at different times during the night and day. Hence, they’ll know when to run the laundry. He also mentioned government rules and regulations can help get things greener and cleaner, faster.
Vucurevich said Cadence has recently learned how to project hardware models into the software domain, which will help optimize energy consumption when the hardware and software are married together in the end. He also said, “Energy efficiency and better utilization of resources requires a holistic view.”
Guardino reported that 275 Silicon Valley employers are now in his organization, working together via conferences, confabs, and commitment to improve the energy ecosystem, and noted the Wall Street Journal that very day had commended IBM and HP for working on their data-center power efficiencies.
But, Guardino also pointed out that only 1.5 percent of the energy consumption in the U.S. (at least, in 2006) was attributable to corporate data centers. Although 10 new power plants will be needed by 2011 to meet the growing data-center energy demand nationwide, the real carbon-footprint offender continues to be the automobile and its darn combustion engine.
Jayaram acknowledged that Cisco’s been slow on the uptake when it comes to jumping on the we’re-all-in-this-together, save-the-planet, energy-efficiency bandwagon, but they’re on board now and wanting to do all they can to improve their own carbon footprint, not to mention the carbon footprint of their customers. Cisco is attacking things through virtualization, Jayaram said, and got nods of approval from Cadence sitting to his right.
[Sitting in the audience through all of this, I thought it might have been a small, but symbolic gesture to turn off the 3 chandeliers, 12 wall sconces, and 2 huge high-intensity flood lights illuminating the room, considering the topic at hand. If there’s ever a panel about reducing energy consumption that’s only illuminated by candlelight, I’ll know we’ve finally arrived.]
Meanwhile, the whole panel was adamant is responding to a question about the role of government in mandating change. First of all, they all reiterated, it’s not semiconductor-based products that are the problem; it’s cars. And, more importantly, governments cannot mandate a solution. The free-market-proponent panel members all insisted that only their customers’ demands for more energy efficient products can ultimately motivate the solution to this most daunting of societal problems.
More inclusively, John Blyler got high marks for pointing out that only through system-level design and multi-disciplinary thinking from constituencies as diverse as chip and board designers, EDA, semiconductor, enterprise and consumer product companies, can we hope beat this energy beast into submission.
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-- Peggy Aycinena, EDACafe.com Contributing Editor.