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October 23, 2006
Dr. Robert Dutton - The Father of TCAD
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Peggy Aycinena - Contributing Editor


by Peggy Aycinena - Contributing Editor
Posted anew every four weeks or so, the EDA WEEKLY delivers to its readers information concerning the latest happenings in the EDA industry, covering vendors, products, finances and new developments. Frequently, feature articles on selected public or private EDA companies are presented. Brought to you by EDACafe.com. If we miss a story or subject that you feel deserves to be included, or you just want to suggest a future topic, please contact us! Questions? Feedback? Click here. Thank you!



** Let's start with the EDAC announcement **


"A pioneering scholar and researcher, Dr. Robert Dutton is being honored for his numerous and significant contributions to the EDA industry in the area of computer simulation of IC technology. Dr. Dutton's pioneering work in both IC fabrication process modeling and electrical behavior modeling of devices and circuits resulted in the SUPREM (Stanford University Process Engineering Models) and PISCES (Poisson and Continuity Equation Solver) simulation tools and software, which have been broadly adopted by the industry and used widely in support of technology development. Dr. Dutton's work continues to be a key factor in the development of new technologies, including those
in the emerging field of nano-electronics."


"The SUPREM process simulation program pioneered by Dr. Dutton's group made it practical to successfully simulate the IC fabrication process using physical models for each step in the process. During his distinguished career, Dr. Dutton co-founded the first TCAD company, Technology Modeling Associates (TMA). Serving as a director of TMA, Dr. Dutton promoted the growth of the TCAD industry and played an instrumental role in TMA becoming a public company. With TMA's subsequent merger with Avanti, TCAD was integrated into the broader EDA industry."


"Dr. Dutton has published more than 200 journal articles and graduated more than four dozen doctorate students. He was Editor of the IEEE CAD Journal (1984-1986), winner of the 1987 IEEE J. J. Ebers Award, 1988 Guggenheim Fellowship to study in Japan and was elected to the National Academy of Engineering in 1991. In December 1996, Dr. Dutton received the Jack A. Morton Award and received the C & C Prize (Japan) in 2000 'For Pioneering Contributions to the Introduction of Practical Computer Simulation into the Manufacturing Process for Semiconductor Devices.' His research interests focus on Integrated Circuit process, device, and circuit technologies--especially the use of Computer-Aided
Design (CAD) and parallel computational methods."


*************************************************


** A conversation **


On one of the loveliest autumn days in recent memory, I had a chance to chat with Stanford professor, Dr. Robert Dutton. He has been chosen by the EDA Consortium to receive the 2006 Phil Kaufman Award, and will be celebrated for his contributions to the industry at the annual EDAC dinner on November 2nd at the Marriott Hotel in Santa Clara. In giving Dr. Dutton the Kaufman Award, EDAC will have come full circle, back to its roots in the profound science and engineering that serves as the basis for the entire electronic design automation industry.


Bob Dutton has been a professor at Stanford since 1971. Currently, he is the Robert and Barbara Kleist Professor of Engineering, and Director of the Integrated Circuits Laboratory. I had a wide-ranging conversation with Dr. Dutton on October 17th, and felt lucky to have had the chance to speak with him. He was leaving for Japan the next day, and wouldn't be returning to California until just before the event being held in his honor on November 2nd.


Dutton grew up in Los Angeles, and came to U.C. Berkeley in 1962. He spent the next 9 years at Cal, earning a BS, MS, and PhD. Towards the end of his time at Cal, he also did a bit of teaching as an acting assistant professor. Dutton describes that appointment as one that says, "You're ready to start becoming a teacher." From Cal, Dutton went on to his distinguished career at Stanford.


Dutton told me, "I was an electrical engineering undergrad at Cal studying solid-state devices, and was basically building thin-film transistors as a graduate student. I was lucky to be a student there in those early days. Cal was one of the leaders in the field, with labs where integrated circuits actually were being built. By the time I was in graduate school, SPICE was just starting to be used to teach in the classes. This was really the very beginning of electronic circuit design in education."


Bob noted that, not only were those exciting years in EE, they were absolutely tumultuous years on the Berkeley campus - years that spanned the Free Speech Movement and the debate over the Vietnam War. Although the Engineering School was somewhat removed from that campus-wide conversation, Dutton told me he was not. He wrote an article for the local press expressing his opinions about the war, and was subsequently interviewed by the Chancellor of the University and the Dean of Engineering. He was also quoted in an article for the Alumni News Bulletin for the College of Engineering in the fall of 1970.


Before we went any deeper into politics, however, Bob reminded me that our conversation was only about physics and engineering, so we continued with his professional story: "My PhD advisor was Richard Muller. Richard Muller was one of the founders of an area called MEMS, micro electro-mechanical systems. Today, he is an emeritus teaching professor and, although he turned 70 a year ago, he's still going strong. The title of my thesis was Tellurium Thin-Film Transistors. The technology was not commercialized, but at the time RCA was using the technology for solid-state cameras, cameras that were the precursors to the digital cameras we think about today."


I asked Bob if he enjoyed his years at Cal. He was unequivocal in his answer: "Oh, yeah! As we say, it was a very exciting place in those days and our department, Electrical Engineering, was just fabulous. I ended up doing as much in the area of circuit design as I did in device technology. And, that's what ended up bringing me to Stanford."


** Stanford **


"For my PhD thesis, I was spending 60 hours a week building stuff at Cal. I spent a lot of time in the lab making thin-film devices. When I came to Stanford, I became involved in the integrated circuit process. At Cal, I hadn't done silicon integrated circuits, but at Stanford, I became involved with projects where we were actually building integrated circuit devices, and looking a the process sensitivity."


"The year I graduated from Cal was one of the hardest years for getting jobs in engineering. Truth be said, I had actually hoped to go to work at Bell Labs after I finished my PhD, but I was not able to land an offer. Although my offer was approved all the way up to the office of a Vice President, Bell Labs had a hiring freeze in place and it didn't go through. I had always figured that I wanted to go teach, but I originally had intended to spend some time in industry first. Since I couldn't land the Bell Labs job, I went to a position in academia at the place I thought I wanted to be in the long term and that was Stanford."


"Actually Stanford wasn't necessarily my first choice - I would have been happy to have stayed at Berkeley - but Stanford had one of the strongest integrated circuit programs, comparable to what was going on at Berkeley. So I said, 'Hey, they've got good technology and this is an interesting opportunity.' [Meanwhile], along the way, I did do a number of summer internships in industry, plus a sabbatical that took me into industry, so I did get to spend some time outside of academia."


[Editor's Note: Dr. Dutton held summer staff positions at Fairchild, Bell Telephone Laboratories, Hewlett-Packard, IBM Research, and Matsushita during 1967, 1973, 1975, 1977, and 1988 respectively.]


"When I first arrived at Stanford in 1971, I started out teaching the introductory device physics classes. At the time, they only had one integrated circuit class, so I was also teaching that. It's hard to believe today - but at the, time analog, digital, bipolar, and MOS design were all being taught in one class. These days that just couldn't be done. So over the next few years, I developed separate analog and digital classes, and then we continued to break the subjects up even further. I was part of the team in the department that eventually generated four different classes out of the original one."


"Wayne Wolf, who now teaches at Princeton, was a student of mine in those days. He was at Stanford at the beginning of the Golden Era of integrated circuits. That's when there was a lot of VLSI design - it was becoming mainstream - and that's the area where Wayne's thesis topic was."


"In the early 1970's, bipolar transistors and devices were still one of the main technologies driving integrated circuits. Bipolar transistors actually have a lot of sensitivities that you have to worry about. In our lab, we were fabricating chips and characterizing those sensitivities. We figured out that we needed better models to predict behaviors, which was some of the motivation for our work."


If industry was already doing that work, wasn't there a duplication of effort in the area of process sensitivity? Bob said, "The answer is yes, and no. Some of the devices we were building at Stanford - remember that Stanford was one of the pioneers in developing some of these devices - had some unusual requirements that were different from what was being done in industry."


"We had been worrying about the sensitivity of how the transistors were going to behave. And, we couldn't get all of the parametrics completely right, so we ended up developing the SUPREM program as a way to characterize those models."


"It turns out we were very fortunate - DARPA came in and funded a major effort to characterize the models. After all, it's one thing to say you've got the computer models that look at the recipes [for the chips] and the process steps, but you've got to have all the materials parameters to go with it."


"So for a dozen years - and on a DARPA scale, that's a long project - we were able to get funding to characterize the various details of the process models. Not only were we able to develop software to simulate what was going on with the process, but we were also able to do a whole bunch of experiments to validate the models and figure out the appropriate coefficients."


** Design for Manufacturing **


I asked Bob if his efforts were ahead of the curve with regards to today's hottest topic, DFM - Design for Manufacturing.


He said, "The issues of design for manufacturability - the technical issues - have shifted focus today from when we were working on it. When we started our work, it was about variations in things like threshold voltages, current gain of the transistor, capacitance, and the junction depths of the devices."


"These days, however, so-called DFM issues have shifted to things like lithography. Although, one theme does carry over from the early process modeling, and that's dopant fluctuations. We were studying what the junction depth would be - the average concentrations. Now today, with the devices being so small, people are also worrying about how individual atoms end up in the structure of the device. Today, people are working at least a two orders of magnitude finer resolution than when we started our work in the 1970's."


I asked Bob if we won't eventually figure out exactly where each dopant atom actually resides within a crystalline structure. Bob answered, "If there's a diffusion process involved, then there's always a statistical component to it. It's true that there are some techniques that some people are pushing on - things like atomic-layer deposition, things that count on chemistry, the making of atomic monolayers that builds things up layer by layer. That kind of control you can get."


"But there's another kind of control that people find interesting in the IC process. That includes things like lithography, transfer patterns, and the degree of certainty with which you can transfer the patterns. There are thermal affects at these [geometries] that start to make those things move around. People are trying to understand today how you can minimize the bad parts of the stuff moving around, but still have a structure. That's really what the DFM research is looking at right now. And, there are pieces of the answers that are starting to come together for how to control all of that."


"For example, people like to talk about self-assembly. There are certainly opportunities to get things to either construct themselves by what their chemistry is, or through whole bunches of bubbles packing together in a hexagonal structure. Those are the things that are at the frontier of where we are today."


"In fact, Wally Rhines stopped by to visit recently when he was here on campus, and he and I were reminiscing about packaging technologies. He certainly lived through those challenges during his years at Texas Instruments - he saw several generations of technology go by during his work there."


[Editor's Note: Mentor Graphics CEO, Dr.Wally Rhines, will be introducing Dr. Dutton at the EDAC dinner on November 2nd.]


** Technology Modeling Associates **


Speaking of industry, I asked Bob to talk briefly about the founding of TMA. Did he take time off from his teaching to found the company he is credited with having co-founding?


He told me, "No, I didn't actually take time off to start the company. One of our recent graduates was working as a consultant. Other staff people and I were working with him, and the consulting seemed to be growing at such a rate that it looked like it was going to turn into something more formal. But no, I didn't take time off to work in the company full time. In fact, the first full sabbatical I took from my teaching at Stanford was in 1988 when I went to Japan to study."


We discussed the issue of academics who are involved in industry. Bob said, "The conflict of interest rules for academia have evolved over the last dozen or so years. Stanford has long had a consulting policy that said as long as you're consulting on the outside, and as long as the time commitment involved isn't excessive, you're okay. But the rules are quite specific."


"When we were starting TMA, there wasn't such tight scrutiny of all of that. Over the last 12 years, however, conflict of interest rules have definitely kicked in. Normally, the policies now are that you're not supposed to take any line management responsibilities in a company if you're teaching full time at the university. Having organizational responsibilities like consulting, or serving in an advisory capacity is okay, and ownership is fine as well."


And, how was the technology transfer handled from the work at Stanford into TMA? Bob said that there are different ways that technology is transferred from the university to the industrial setting: "In our case, when we founded TMA, we licensed our own technology out of the university. And, of course, competitors were able to license the same technology. That's not news - it was the way things were done. Besides," he added, "It's the people who create and use the technology that make the difference. It's rarely just the technology.


** A Nobel Prize? **


So, would Bob Dutton say that Stanford has been a lucky location for him to have spent his career? He said, "Stanford's been lucky in a couple of regards. To say that Stanford is small isn't quite right, although it's smaller than many schools. We do have smaller numbers of faculty than MIT or Berkeley, but the thing that makes the difference here is that we have very low barriers between departments working together. Those interdisciplinary things that have gone on here at Stanford, for years and years, have been the key to our success."


"Certainly in this process modeling area, we really can't do it without collaborating with materials science, chemical engineering, and a number of other groups that we interact with in dealing with processing technology. And you can take that as partly an historical comment and partly a comment on future opportunities here at the university."


As several Stanford faculty members have just received the Nobel Prize, I asked Bob if he thinks the extraordinary science that goes into semiconductor manufacturing would ever garner the prize. Bob said he didn't think so: "The Nobel Prize historically has gone more to the basic sciences, rather than engineering."


But, isn't the laying down of atomic monolayers akin to basic science? Bob said, "Certainly things like atomic tweezers and controlled reactions, from that point of view, are in the realm of basic science, but the Nobel Prize in generally awarded in specific scientific disciplines like physics and chemistry. That's been the tradition in the Nobel world."


"But it's also true," he added, "That Jack Kilby, Zhores Alferov, and Herbert Kroemer shared the Nobel Prize in 2000. Kilby got it for the integrated circuit, and Alferov and Kroemer got it for the device physics, which is kind of at the edge of physics. That certainly was a great day in engineering to see the Nobel Prize awarded to people who were doing things that led to engineering. But I think it's not the norm, although one should never say never. I think in general, there's got to be some breakthrough that looks more like a scientific breakthrough to warrant the prize."


"So one example of a breakthrough - something that's really profound that could be a candidate - is carbon nanotubes. People have been building nanotubes, and talking about nanowires as something that may keep Moore's law going for a few more generations. But they're finding that it's really hard to get the nanotubes to go where they want them to. Nanotubes don't follow lithographic rules. If somebody figures out how to make virtually 100 percent of the nanotubes go where they want them to, and can make them all semiconducting with the same properties, as far as I can see that would be an 11 on a scale of 1 to 10. And probably, from a Nobel point of view, that would be a real contribution
to physics."


** The Rewards of Teaching **


In the next phase of our conversation, I asked Bob what things he enjoys most about teaching. He said, "Right now, I'm teaching an undergraduate class in radio design. We're building walkie-talkies from scratch. I love to see these kids working on projects like this. Their lights go on in a way that it never does when they're just doing problem sets. In a design project, they're doing far more than just getting an answer to a problem. In this radio class, for instance, they have to show me how far they can transmit. They transmit from the top of the Packard building here on campus, and one of the teams last year was able to transmit as far as Fry's Electronics - that's over 2 miles away."


"These kids are just incredible and fun - especially when they actually 'get it.' And the fact is that 5 years from now, if one person out of ten from one of my classes goes out and does something cool with what they've learned, I will know my classes have made a difference in their work. And, I've had enough of those students over the years to make my teaching career very fulfilling."


What is Bob teaching right now? "I'm teaching EE 133, analog communication, EE 114x, a class that we're still working on that includes SPICE and computer-based circuit design, and EE 215. That one's what I call a 'retro class' because it covers bipolar circuit design. It turns out there's a lot of great stuff that is sort of getting forgotten - which is why it's retro. But, you can actually do silicon germanium HBTs with our SPICE models. We have a whole bunch of people who are really excited to be taking that class."


I asked Bob if he teaches with FPGAs, and he said no, not really: "There are several people in the computer systems lab who are using FPGAs, but my undergraduates think it's too much like software to do that kind of chip design. My students like the feel of real boards and cables. With circuit simulation, you can get all of the design fun out of seeing things work - in a simulation sense - but you're right, to get real hardware to validate and test, it's a much longer process. You've got to sign up for an independent study class to evaluate a chip you've designed in class, if we go on to fabricate it."


** The EDA Ecosystem **


I asked Bob to talk about the direction he sees - past, present, or future - in EDA. He said, "Certainly the overall food chain is moving higher and higher, although I'm only repeating things there that I've heard from other people."


"Starting historically, from the time that Wayne Wolf was a student here, the work to get logic to do what you want, and structuring logic to higher and higher system levels has been part of our work. In fact, the move to synthesize and manipulate structures at a higher and higher level, that's been the mainstream of design automation all along. Meanwhile, various other things have been getting worse, things like the sensitivity of parameters, timing delays, timing closure, and now heat on the chip, have been part of a whole set of issues that we have looked at."


"Actually, timing was an interesting transition point in the history of EDA. Everybody was worrying about timing closure, which brought up the questions about how you get into the parasitics that control your delays. That's where one of our early successes with TCAD started producing a Golden Standard. It would give you a capacity model for what the interconnect would look like. And that Golden Standard of the interconnect could be connected to the EDA model for synthesis. It was actually a slightly different view of the process of device modeling, but it was going after parameters that were more detailed and messy than what you were dealing with in normal EDA tools."


"Another important area has been transistor-level models. Process modeling gets you as far as where all the dopants are, but if you don't know what the dopants do, you have to get to the SPICE transistor models. That's where the other program we developed - the PISCES program - fits in as an example of something that takes doping and gives you the electrical characteristics. Device people were using that to design actual transistors. The EDA people would use that model to try to improve the SPICE model, and look at the variations of how oxide thickness and junction depths would lead to variations."


"Something else that was interesting about PISCES - it was one of the first programs that looked in detail at substrate effects. And these days, at least within the last 5 to 7 years, as people have been pushing the SOC, they have ended up worrying about substrate coupling between the analog and digital portions of the chip a great deal. Part of that is due to substrate noise, and it requires you to look at the layers."


"In the 1980's, when Wayne Wolf was a student here, he and some of his cohorts were doing some of this TCAD work. Back in those days, latch-up was a big problem. P- and N-type MOS devices would talk to each other through the substrate and short out the power supply. It would be like patching one power supply through to the other, which would melt the chip. It wouldn't do the power supply much good either," Bob said, chuckling. "In the 1980's, you needed to have all of the details of the doping substrate, plus an analysis program that understood parasitic effects in the substrate."


"Today, we are way beyond that. In the commercial setting, they're dealing with substrate noise, but in another area they're also optimizing today for stress engineering. The way transistors are being made, people are using stress to have devices with higher mobility. But stress fields are not uniform fields, so across the chip you've got to worry about what the stress is at each point. It's like what happened with the interconnects."


"And as always, you need detailed models to extract something that can be used at a higher level, something that says, 'Here's how this detailed stress information will influence your distribution.' Now today, we're seeing the need for diffusion modeling, stress modeling, mobility modeling, and it all needs to be tightly integrated together in the code. But as always, we feel that if you can fabricate, you can model the fabrication."


** The Kaufman Award Speech **


In closing, I asked Bob if he is ready for his presentation on November 2nd. Bob told me he has just about finished his slides for his talk at the EDAC dinner. About a third of the slides, he said, thank the various people he's been involved with over the years. He noted, "As many as two dozen of the former people involved with our work are going to be there, so I need to be sure to include them all!"


"Also some of my slides are anecdotal - I have some early stories and pictures to share. Plus there will be the chronology of bipolar variability, and the technology that I was fabricating in the lab in the early days. It's hard to believe, but T.J. Rogers was actually one of the students back then. He was a grad student while I was an assistant professor. Now that was interesting!"


"Overall, I will recount what people were working on at the time, the state of the art of the chips. I hope my talk will indicate that we were really going up the learning curve fast in those days, and then I'll fast forward to how things developed that led to SUPREM and PISCES becoming mainstream tools."


Then Bob added a cautionary note about the introduction prior to his talk: "Wally Rhines has got a snapshot of me from back in the days at Cal."


"Excellent," I said. "Now that should be interesting!"


*************************************************


** A Few Additional Notes **


* The Phil Kaufman Award winners include: Hermann Gummell (1994), Donald Pederson (1995), Carver Mead (1996), Jim Solomon (1997), Ernest Kuh (1998), Hugo de Man (1999), Paul Huang (2000), Alberto Sangiovanni-Vincentelli (2001), Ron Rorher (2002), Richard Newton (2003), Joe Costello (2004), Phil Moorby (2005), and Robert Dutton (2006).


* The Team at Gartner Dataquest


I had the stunning news from Gary Smith on October 19th that the EDA analyst group at Gartner Dataquest has been discontinued. The group includes Gary, Daya Nadamuni, Nancy Wu, Laurie Balch, and Sharon Tan. Before we talked about his future, and the future of the group, Gary told me of the debt the EDA industry owes to Richard Goering from EETimes: "One of the things that really amazed me when I originally took this job with Dataquest, was the fact that EDA had developed this wonderful infrastructure. In the main, it was due to the wonderful coverage that Richard Goering provided for the industry. EDA had coverage that, normally, no $4 billion industry ever gets …
almost more than its fair share. And, that coverage had been going on for years before I joined the industry."


Gary spoke about the Design Automation Conference: "The EDA industry also had this show - DAC - that I would have died to have had in the larger semiconductor industry back in the days when I was working in marketing there. So, here was this industry with this marvelous infrastructure, and I was delighted that I could fit right into it. There was this real feeling of community within EDA, which continues on today. Our group at Gartner Dataquest believes we have a thorough understanding of the community, and the technology, and we would like keep the group together - perhaps within a different organization. It would be a real shame not to keep us all together."


Editor's Note: I would like to express my own gratitude to everyone in the EDA group at Gartner Dataquest. You all have been a tremendous help to me over the years, answering my endless questions, and providing all sorts of commentary on a host of topics. Everyone in this industry owes a debt of gratitude to all of you for your hard work, work which has also enhanced the sense of community within EDA. Thank you!


* ESL Article for November


This is an editorial opportunity to be listed in a tools table that will be included in an upcoming article on ESL. The article will be published on EDACafe.com on November 6, 2006. If your company is interested in participating, please respond with the following information:


1) Company Name

2) URL

3) Tool Name

4) Target user(s) (system architect, embedded software developer, hardware developer, verification engineer, other)

5) Design Language(s)

6) Description (40 words max!)

7) Price


If the company has more than one tool, please submit a separate listing for each tool. Also, please note that the definition of ESL is still somewhat more of an art than a science. If your tool really isn't an ESL tool, please don't submit it for the table. Thanks for your cooperation here. The deadline for responding is Monday, October 30th.


Peggy Aycinena

Editor

EDA Confidential

Contributing Editor

EDA Weekly

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-- Peggy Aycinena, EDACafe.com Contributing Editor.


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