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August 16, 2004
MATLAB & Simulink
Please note that contributed articles, blog entries, and comments posted on EDACafe.com are the views and opinion of the author and do not necessarily represent the views and opinions of the management and staff of Internet Business Systems and its subsidiary web-sites.
Jack Horgan - Contributing Editor

by Jack Horgan - Contributing Editor
Posted anew every four weeks or so, the EDA WEEKLY delivers to its readers information concerning the latest happenings in the EDA industry, covering vendors, products, finances and new developments. Frequently, feature articles on selected public or private EDA companies are presented. Brought to you by EDACafe.com. If we miss a story or subject that you feel deserves to be included, or you just want to suggest a future topic, please contact us! Questions? Feedback? Click here. Thank you!

While doing research on articles for ESL I came across several references to MATLAB and Simulink from The MathWorks. These products were identified as tool for algorithmic development and simulations in the early stages of system design. I thought I would investigate further.

The MathWorks was founded in 1984 and employs more than 1,000 people worldwide, with headquarters in Natick, Mass. The MathWorks produces technical computing and model-based design software for engineers, scientists, mathematicians, and researchers across a board range of industries. In 2003 The MathWorks had revenue of around $240 million. The firm claims more than 1,000,000 customers in over 100 countries, on all seven continents. The MathWorks products are in use at 3,500 universities.

The two core packages are MATLAB, used for performing mathematical calculations, analyzing and visualizing data, and writing new software programs and Simulink, used for modeling and simulating complex dynamic systems. The company also develops and markets an extensive family of add-on products to meet the more specific needs of vertical-markets.

MATLAB is a high-level technical computing language and interactive environment for algorithm development, data visualization, data analysis, and numerical computation. MATLAB is used in a wide range of applications, including signal and image processing, communications, control design, test and measurement, financial modeling and analysis, and computational biology. Add-on toolboxes (collections of special-purpose MATLAB functions, available separately) extend the MATLAB environment to solve particular classes of problems in these application areas.

The MATLAB language provides all the features of a traditional programming language as well as supporting vector and matrix operations while eliminating the need for memory management and variable declaration. It also enables visualization of engineering data via 2D and 3D plots and volume visualization. Functions are provided for integrating C and C++ code, Fortran code, COM objects, and Java code with application codes. It can read data from popular file formats, such as Microsoft Excel; ASCII text or binary files; image, sound, and video files; and scientific files. It can also acquire data from hardware devices.

MATLAB tool boxes include Statistics and Data Analysis, Control System Design and Analysis, Signal Processing and Communications, Image Processing Test & Measurement, Financial Modeling & Analysis.

Simulink is a platform for multidomain simulation and model-based design of dynamic systems. It provides an interactive graphical environment and a customizable set of block libraries that let you accurately design, simulate, implement, and test control, signal processing, communications, and other time-varying systems. With Simulink one can build complete end-to-end simulations, integrating components such as analog/mixed signal, DSP, digital communications, and control logic. Through simulation, one can ensure the system performs to specifications, explore design trade-offs, and tune parameters to optimize performance. Add-on products extend the Simulink environment with tools for
specific modeling and design tasks and for code generation, algorithm implementation, test, and verification.

Simulink enables one to build a detailed block diagram of a system models by dragging and dropping blocks from the library browser onto the graphical editor and connecting them with lines that establish mathematical relationships between the blocks. One can define and control the attributes of signals and parameters associated with the model. Signals are time-varying quantities represented by the lines connecting blocks. Parameters are coefficients that help define the dynamics and behavior of the system. Solvers are provided to support the simulation of a broad range of systems, including continuous-time (analog), discrete-time (digital), hybrid (mixed-signal), and multirate systems of
any size. The model is simulated and refined until it performs as expected. The refined system model then becomes the executable specification that's shared among design teams for system testing, verification, and implementation.

Real-Time Workshop generates and executes stand-alone C code for developing and testing algorithms modeled in Simulink. The resulting code can be used for many real-time and non-real-time applications, including simulation acceleration, rapid prototyping, and hardware-in-the-loop testing. You can interactively tune and monitor the generated code using Simulink blocks and built-in analysis capabilities, or run and interact with the code outside the MATLAB and Simulink environment.

On June 2nd MathWorks announced the availability on Windows, UNIX/Linux, and Macintosh systems of the latest versions of its core products, namely MATLAB 7 and Simulink 6. MATLAB pricing starts at $1,900, while Simulink Pricing starts at $2,800.

In October 2003 MathWorks and Mentor Graphics announced the release of Link for ModelSim, a cosimulation interface that integrates MATLAB and Simulink into the hardware design flow for FPGA and ASIC development. It provides a fast bidirectional link between MATLAB and Simulink and Mentor Graphics' HDL simulator, ModelSim. It enables direct cosimulation and lets you efficiently verify and cosimulate ModelSim RTL-level models from within MATLAB and Simulink. Link for ModelSim supports the developing software test benches in MATLAB or Simulink for HDL entities, including HDL models in larger-scale system models developed and simulated in Simulink , generating test vectors to test,
debug, and verify HDL code against its original MATLAB or Simulink specification and providing behavioral modeling capabilities for HDL simulation in MATLAB and Simulink and verifying, analyzing, and visualizing HDL implementations in MATLAB and Simulink.

The MathWorks Connections Program directory is a broad collection of commercially-available products and services based on the MATLAB technical computing environment. Relevant listings in the directory are offerings from Altera, Xilinx, Accel, Synplicity and startup Catalytic.

The Xilinx System Generator for DSP is a plug-in to Simulink that enables designers to develop high-performance DSP systems for Xilinx FPGAs. Designers can design and simulate a system using MATLAB, Simulink, and Xilinx library of bit/cycle-true models. The tool will then automatically generate synthesizable Hardware Description Language (HDL) code mapped to Xilinx pre-optimized algorithms. This HDL design can then be synthesized for implementation in Virtex-II Pro Platform FPGAs and Spartan-IIE FPGAs. As a result, designers can define an abstract representation of a system-level design and easily transform this single source code into a gate-level representation. Additionally, it
provides automatic generation of a HDL testbench, which enables design verification upon implementation.

The Xilinx System Generator for DSP bridges the gap between the high-level abstract version of a design and its actual implementation in a Xilinx FPGA. New capabilities include HDL Co-Simulation, Hardware in the loop (HIL), and the ability to estimate FPGA resources from within Simulink.

AccelChip's high-level DSP synthesis tool provides a direct path from the MATLAB technical design language to industry-standard FPGA and ASIC design flows for DSP designers. With AccelChip, designers can easily load DSP algorithms as script M-files and the tool automatically determines the design's structure and provides an intuitive debugging environment. AccelChip automatically performs floating- to fixed-point conversion and then produces synthesizable RTL (VHDL, Verilog) models and simulation testbenches to eliminate the time-consuming and error-prone manual creation process. AccelChip uses the Resource Description Language (RDL) to optimize the creation of RTL models based on
the resources available within the targeted FPGA device.

Altera's DSP Builder links MATLAB/Simulink environment to its own Quartus II environment. Designers can use the blocks in the DSP Builder library to create a hardware implementation of a Simulink system modeled in sampled time. The DSP Builder library contains bit and cycle accurate Simulink fixed-point blocks, which cover basic operations such as arithmetic or storage functions, as well as complex functions such as forward error correction or filtering. The DSP Builder library SignalCompiler block reads Simulink model files (.mdl) and writes out VHDL files and Tcl scripts for hardware implementation and simulation. This HDL design can then be synthesized for implementation in
Altera APEX II, APEX E, FLEX 10K, FLEX 6000, and Mercury device families.

Starting from a floating-point algorithm in MATLAB, Catalytic users will rapidly convert to fixedpoint versions, analyze them with accelerated simulation and explore them with MATLAB visualization features, saving development time and eliminating difficult-to-find errors. Catalytic's products augment MATLAB with the ability to define, simulate and test true fixed-point math and include a convenient user interface to manage the conversion process. Catalytic's simulation acceleration expands the user's ability to verify and test his floating-point as well as fixed-point algorithms. Catalytic is now in an extensive Beta testing period prior to launching products later in 2004.

The Synplify DSP product automates the implementation of RTL from a Simulink system-level specification. No hand-coding of any RTL is required. Included in the Synplify DSP solution is a set of functional blocks commonly used in DSP design such as filtering (FIR, IIR), transforms, math functions, CORDIC, signal operations, memories, and control logic. These functions were designed to be technology-independent and are tightly integrated into The MathWorks environment, allowing the algorithm designer to utilize Simulink features such as discrete time simulation, multi-rate management, fixed point quantization, scope debugging, and more.

Also on August 11th Cadence announced (see link below) that it and Cybernet Systems in Japan had co-developed the PSpice SLPS interface between OrCAD's PSpice technology and MATLAB and Simulink from The MathWorks. This will allow co-simulation of electrical and mechanical systems.

MathWorks biggest competitor is home grown systems within target prospects. Mathematica from Wolfram Research could be considered a competitor to MATLAB. Mathematica seamlessly integrates a numeric and symbolic computational engine, graphics system, programming language, documentation system, and advanced connectivity to other applications. Since Mathematica was first released in 1988, its user base has grown to over a million. Mathematica is used today in all of the Fortune 50 companies, all of the 15 major departments of the U.S. government, and all of the 50 largest universities in the world.

Letter to the Editors

Thanks for a good review of the status of data exchange and interoperability, as it affects the EDA market.

One of my frustrations in this area is that so many promises of these efforts seem to go unfulfilled.

In my early years of EDA work, the CAD Framework Initiative (CFI) was supposed to solve all of our intra-vendor problems. I listened to speakers describe a bright future where design work would be unencumbered by vendor-specific flows; we'd be free to choose the best tool for any job, knowing that CFI-developed standards would allow smooth data transfer.

Of course, it didn't work out that way. I''m sure some standards and interfaces came out of CFI, but I'm still living in an EDA world of uneven standards and inconsistent efforts.

Sadly, your column seems to confirm this status. Most efforts are directed by vendors who rightly have their own interests at heart; other sincere, independent work is being done - but mostly in pursuit of a single, particular problem.

Still, I hope for a world where designs can be easily exchanged, viewed, edited and manipulated as needed.


Phil Lindberg

Design Automation, Technical Services Department

The Johns Hopkins University Applied Physics Laboratory


I enjoy reading your column every week. However, after reading this week's column on my company (Intel), I feel obliged to comment.

You presented a wealth of facts and data. What I find lacking is YOUR opinion on how the company is doing and how the company is projected to perform in the future. An opinion from an expert like yourself will be far more interesting and valuable to our readers than a collection of facts, most of which can be mined from various sources. This is actually what I enjoyed from the previous editor (Peggy).

Thanks for writing the weekly column and I hope for more interesting articles in the future.

Dr. Joon Kim from Intel, Portland, OR


After selecting a topic I do a considerable amount research devouring as much information as I can find, digesting it, filtering it, organizing it and then writing and editing a column. I also try to speak to people at companies related to the weekly topic. A reader with sufficient interest, time and inclination could presumably acquire the same information that can be quickly and easily read in my column. My opinion is reflected in the topics I choose, the information I included and exclude and so forth. When you say it would be valuable to express my opinion on how a company is doing and how a company is projected to perform in the future, are you speaking from a technological,
business or stock price perspective? I co-author quarterly columns on this website and its sister website MCADCafe concerning the financial performance of IP, EDA and MCAD vendors. However, we do not speculate on the future business results or stock prices. So called experts in these matters have a difficult enough time explaining the past much less the future. In the article on Intel I pointed out that AMD had been able to capitalize on their decision to support 32-bit compatibility in their 64-bit chip and Intel was playing catch up in this arena. I also noted recent Intel product delays and reported in a subsequent column the response from CEO. Incidentally, Intel just announced
that its Sonoma platform launch would be delayed until Q1 due to some quality issues with the Alviso chipset, a component of the Sonoma platform. The Alviso chipset promises to boost performance of Intel Centrino notebooks, which use its Pentium M processor.

Note: After each weekly commentary it is not unusual to get a letter saying I omitted a particular firm or suggesting that I should include a particular firm in a later article. My time and the editorial space simply do not permit me to investigate and report on every vendor in a given field. I apologize to those who have been and in advance to those who will feel slighted. Two examples follow.


I recently joined your newsletter audience.

I know that the PLM topic is not the most current, but I thought you should
know that you left out another key PLM company - Arena Solutions. Arena is the
fastest growing PLM company in the industry and the world's only on-demand PLM

I would like to discuss further if you consider the topic still relevant to you

Please give me a call or email to discuss further.


Mike Nelson

Director, Business Development

Arena Solutions


I am aware of Arena Solutions. The company began in February 2000 as bom.com, a clever play on Bill Of Material. Unfortunately, this name became a negative when the dot.com implosion was frequently referred to as dot.bom. The company was renamed Arena Solutions in January 2003.

Product Lifecycle Management is a combination of CAX, Product Data Management and Collaboration. The PLM market is composed of firms that offer CAD products (Dassault Systemes, PTC, UGS, and AutoDesk) and those that do not (MatrixOne, AgileSystems). The former have much larger revenue due principally to their CAD business. MatrixOne and AgileSystems have annual revenues of approximately $100 million.

Arena is much smaller, although the firm reports that it has achieved nine consecutive quarters of at least 30 percent growth and annualized revenue growth of more than 300 percent during the 12-month period ending March 31, 2004. Arena numbers more than 150 customers.

Arena Solutions is unique among PLM vendors in that its business model is exclusively on-demand solutions, aka hosted solutions or ASP (Application Service Provider). Of course there is nothing to prevent a System Integrator like IBM or EDS from providing PLM as a hosted service to a client.

Arena PLM contains three application suites-Product Arena, Sourcing & Costing Arena and Integration Arena. The Product Arena suite includes the core Product Definition module and optional modules for Manufacturer Management and Change Management. Arena offers these products as a bundle for a one-time cost of $9,995. User licenses are available for $995 per year with no set-up or installation fees. The Product Definition module, the foundation for Arena PLM, provides a centralized environment for managing product data around a bill-of-materials framework.

The first Sourcing & Costing Arena module is the core Vendor Management module, a framework for capturing full sourcing information - suppliers, costs, lead times and more for managing the AVL, item sourcing, purchasing BOMs, purchase histories and quotes.

Arena Integration adapter links include MFG/PRO by QAD and SolidWorks.

Customers include companies such as Accordian Networks, Accumux Technologies, Strida Bicycle, IronPort Systems, Deepsea Power & Light, Metallic Power, Atlas Snowshoe, Color Kinetics and Alien Technology.

Arena has an eye-catching website at arenasolutions.com.


I was surprised to see you overlook Runtime Design Automation in your July 26 column on Grid computing. They were covered favorably in John Cooley''s DAC 2003 trip report and profiled in depth in Tom Moxon''s 2002 EET series on design flows.

I was glad to see you covering grid computing as it clearly has become the default platform for most electronics design: a direction that was less clear six years ago. Even four years ago a 500 machine farm was considered large but now numbers 10-20X that size are the norm for major semi and system houses.

The interesting thing about Runtime is that they own the short run job niche (e.g. flows that combine jobs that are each less than 15 cpu minutes, such as you would encounter in library characterization) due to their extremely low startup delay for new jobs (one to two seconds vs. 30 seconds to a minute for LSF). If EDA flow designers adopt a "web services" model of knitting together many short run jobs in a grid the Runtime scheduler and flow manager may become the default.

I am not an employee or consultant to Runtime and you should probably get a formal statement from either Frank Bailey their VP of marketing or Andrea Casotto their CEO.

S. K. Murphy


I also receive a letter from and talked with Andrea Casotto, founder and CTO of Runtime Design Automation. His company was founded in May, 1995. This technology was initially developed at the University of California at Berkeley between 1989 and 1991; it was extended and tested at Siemens from 1992 to 1995. The company is relatively small. Its best year revenue wise was $1M. The firm offers two products Flowtacer/EDA and Flowtracer/NC (NC as in network computing).

Flowtracer/EDA is a dynamic, automatic, selfcorrecting, multi-user, multi-platform dependency management system. Flowtracer/EDA manages any EDA flow such as those used to design vast libraries of cells, IP cores, multi-million gate ASIC's and SOC's. It discovers parallelism; dispatches jobs to the local grid and queues limited resources, such as CPU's, RAM, and licenses. Andrea claims that their event driven scheduler offers advantages in responsiveness particularly when
scheduling a large number of small jobs.

Flowtracer/NC optimizes the use of hardware and software resources by automatic resource matching, dispatching, queuing, and load balancing. Each job is sent to the fastest machine that offers all the necessary resources. Flowtracer/NC implements all the features expected of a modern network computing system, including: fair-share allocation of CPU cycles; job priorities and preemption; and matching of jobs to computers based on RAM, swap, load, etc. Flowtracer/NC enables users to identify jobs that have completed, failed and are still waiting. It provides complete and accurate metrics that include: unmet demand, wait time, and no demand or idle time. The largest known single flow
manages more than 500,000 files and 100,000 jobs. The product sells for $600 per machine rather than per cpu.

Runtime Tracing is the key element of Flowtracer technology. All input and output dependencies for each tool are computed by the tools themselves at run-time. The technique used to activate runtime tracing is a combination of interception of operating system calls; encapsulation by means of a script; or instrumentation of the source code.

RTDA customers include Altera Corporation, Ammocore, ATI Technologies, Azul MicroSystems, Cadence, Faraday, Flextronics, Microsoft, ON Semiconductor, ST-Microelectronics, SUN Microsystems, Tera Systems, Virtual-Silicon, and Virage Logic.

Weekly Highlights

Cadence Announces New OrCAD Technology to Help Shorten PCB Design Cycles; PSpice Enhancements Provide Highest Level of Integration Between Analog Simulator and MathWorks' MATLAB

Carbon Design Systems Joins 0-In's Check-In Partner Program

Sequence Co-sponsors International Symposium on Low Power electronics and design

Pericom Semiconductor Delivers Industry Dominant Performance DDR2 Buffer and PLL for Registered DIMMs

LSI Logic DVD Recorder Processor Enables JVC's First '3-In-1' Digital Video Recorders

Atmel's Offer for Electronic Identity Strengthened by Its New 72 KByte EEPROM Dual Interface Secure Microcontroller

LSI Logic Broadens Processor Offering for RapidChip(TM) Platform ASIC Designs

NVIDIA and BOXX Introduce First Gelato-Ready Server Node

More EDA in the News and
More IP & SoC News

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-- Jack Horgan, EDACafe.com Contributing Editor.