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EDA Magazine Review September 22, 2003

Cadence
What Goes Around Comes Around
Please note that contributed articles, blog entries, and comments posted on EDACafe.com are the views and opinion of the author and do not necessarily represent the views and opinions of the management and staff of Internet Business Systems and its subsidiary web-sites.
Peggy Aycinena - Contributing Editor


by Peggy Aycinena - Contributing Editor
Posted anew every four weeks or so, the EDA WEEKLY delivers to its readers information concerning the latest happenings in the EDA industry, covering vendors, products, finances and new developments. Frequently, feature articles on selected public or private EDA companies are presented. Brought to you by EDACafe.com. If we miss a story or subject that you feel deserves to be included, or you just want to suggest a future topic, please contact us! Questions? Feedback? Click here. Thank you!

Guess what - vertical integration is back. The disaggregated design chain has been re-aggregated, and Big is Beautiful once again.


I got the news first hand from Chartered Semiconductors' Kevin Meyer, Vice President of Worldwide Marketing and Sales, in a lengthy phone call on Tuesday, September 16th. Kevin's a really articulate guy and his message was unambiguous. If you used to be an IDM and are still an IDM, you're going to be a winner going forward. Meanwhile, the fabless guys better watch out because the IDMs are reasserting control in the design, process technology, and foundry issues slated to rule the roost in the coming years.


What Meyer had to say was in conjunction with several Press Releases from Chartered Semiconductor and IBM. Here is the abridged version:


Chartered Semiconductor Manufacturing announced the formation of the NanoAccess Alliance in support of Chartered's NanoAccess semiconductor manufacturing technologies at 90-nanometer technologies and beyond. Under the NanoAccess Alliance, Chartered and more than 15 third-party companies are pre-qualifying 90-nanometer design solutions for earlier silicon validation and lower risk production of leading-edge IC and SoC devices.


Qualification of 90-nanometer design libraries, memory components, EDA tool support, and third-party IP has been in active planning since the Chartered and IBM joint development agreement for 90-nanometer manufacturing technologies was first announced in November 2002. Silicon validation and pilot projects are currently being scheduled with first silicon multi-process wafer (MPW) runs in October 2003. Major design deliverables are set to be silicon validated by early 2004, in advance of 90nm design starts expected to gain momentum in this timeframe.


As a result of the joint development, Chartered and IBM will have compatible third-party programs targeted at developing common design solutions for the resulting nanotechnology process platform. The programs are referred to as "NanoAccess Alliance" and "Ready for IBM Technology" by Chartered and IBM, respectively.


The NanoAccess Alliance is an extensive ecosystem of 90 nanometer third-party library, EDA, and IP companies that currently includes ARM, Artisan Components, Inc., Cadence Design Systems, Inc., ChipIdea Microlectronics, IBM, Mentor Graphics Corp., MoSys, Inc., QualCore Logic, Synopsys, Inc., and Virage Logic Corp.


Outsourced design and manufacturing-related services are also part of Chartered's NanoAccess Alliance. Design companies include Flextronics and QThink, while manufacturing service providers include Dai Nippon Printing Co., Ltd., ST Assembly Test Services Ltd., Toppan Printing Co., Ltd, and its subsidiaries, and Unitive Semiconductor Taiwan Corp.


Chartered announced the immediate availability of the joint Chartered and IBM 90-nanometer design manual and SPICE models to early adopters for design prototyping. Initial process qualification for both FTEOS and low-k dielectric options is targeted for completion by the first quarter of 2004. Chartered is offering multi-project wafer (MPW) runs starting in October 2003. Chartered has qualified Dai Nippon Printing for 90-nanometer mask production. Toppan Printing and its subsidiaries are currently under qualification.




Per Kevin Meyer: “During the 1990's - particularly at the beginning of the decade - virtually every semiconductor company was an IDM in the sense that they did the design, had their own process technology development, and their own manufacturing capacity. In that era, companies like Motorola and IBM did their own library development, their own DSPs, their own process development, even their own packaging in most cases.”


“But by 2000, few companies did any of those things - there was a very different state of affairs in the industry. There was a heavy reliance on out-sourcing relationships and a growing dependence on value-added IP. Companies became reaggregators of IP, relying on the foundries for process development and wafer development. Relationships were developed with companies like Artisan for libraries, Virage Logic for memories and memory compilers, relationships with ARM for StarIP. The designs out of these [fabless] semiconductor companies became reaggregations of IP - [even as the] emergence of the foundry model signaled the disaggregation of the semiconductor value chain. There were over
600 semiconductor companies, but only a handful owned their own foundries.”


“[However], everything has changed at 0.13 micron and below. Suddenly the ability to reaggregate IP has became very difficult, reversing the pendulum, and [triggering a situation where] companies that want to be successful have to design their processes to meet the application need, need to have a priori knowledge of the tools, the IP, and so forth. The whole ability to reaggreate technology from disparate companies has become extremely difficult as geometries shrink. The design challenges have become very significant. The ability to get a design right the first time at 0.13 micron is much more difficult.”


“[Subsequently], companies like IBM who develop processes for applications, and who have timing closure abilities, are much better situated for developing very complex designs. Going forward, the fabless guys are going to be very challenged [in trying to compete with companies like IBM].”


“[Clearly], the reaggregataion challenge is very difficult right now. If you look at the number of transistors that designers are designing around, they're having to fill products up with IP from many different companies - IP that was never meant to play together. The [commercially available] tools are becoming increasing challenged. With gate oxides [reaching a point where they are] just a couple of molecules thick, having to understand how to design for manufacturing - which was one of the key differentiators in the 1990's - now presents a big, significant challenge. I believe the big companies, the old IDMs, are in the best position to prevail [in today's market].”


“[Consider] from 1990 to 2002; we came down the tech road map from 1 micron plus, down to 0.13 micron. The fabless semiconductor model worked at 1 micron, at 0.25 micron, at 0.18 micron. Companies like Broadcom, Altera, Xilinx were all very successful in moving down the technology spectrum to that point. But at 0.13 micron, the industry was unable to sustain the flow. We saw signs of the challenge in the difficulties of getting 0.13 micron to market.”


“We also saw [in that same time period], the utilization of two new materials in the manufacturing process - the integration of copper and low-k dielectrics in the interconnect strategy. This caused [huge challenges] in the re-aggregation of IP. Additionally, mask sets went from $100,000 to $500,000 in that same period, while designs that didn't come out right with the first spin, were requiring [costly] re-spins.”


“[Now what we're seeing is that] although throughout the 1990's, there was a disaggregation of the value chain, at 130 nanometers and below, the value chain has to reaggregate. IBM and Chartered are working closely with Synopsys, Cadence, Mentor, ARM, Artison and others to provide the learning [to do that]. IBM is an $84 billion technology and services company, which can invest to build high-performance ASICs and microprocessors. They're taking a different approach these days - developing processes more from an application [point of view] with a priori understanding that a particular product has to go, for instance, into a high pin-count package. They're developing in-house tools for
timing
closure and developing those tools with an a priori understanding of the process technology needed.”


“And, by the way, the fact that IBM is also an enterprise systems company first means that they have no problem providing technology to their customers and partners. Through Chartered's joint development with IBM, we're trying to provide access to the learning that's gone before. IBM is an IDM and [has extensive experience developed in connection with] their own ASICs and PowerPC.”


“So the thing we're announcing here is really the availability to customers of the deliverables required to do a 90-nanometer design, starting off with a very comprehensive design manual that includes the design rules needed to do 90 nanometers. One of the benefits of our relationship with IBM is access to all of their innovations in material science. What Chartered brings to the relationship is a clear understanding of what the customers need to implement over a broad array of applications, how to get a design into a manufacturable state, how to integrate it into a flow that allows them to make money.”


“Yes, this is big news for the fabless guys as they're not going to be asked to be guinea pigs anymore to prove the process technologies. And though they'll still have a tremendous amount of opportunity to add value, they should be aware that the IDMs have folks [on staff] who can do design, develop their own tools, own their own IP, and can look at the process side and the silicon side at the same time.”


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-- Peggy Aycinena, EDACafe.com Contributing Editor.





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