March 29, 2010
Agilent EEsof EDA – Part II
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“This is definitely one of the areas where we are making an intensified investment. We have several industry leading customers working closely with EEsof R&D. They tell us that many suppliers claim to have a complete RF MMIC/Module flow, but few really do when you cut through the hype,” said Larry Lerner. “We're getting good feedback from these customers that EEsof is on the right path, and we're going to keep investing in this area because we believe we're in a good position, with all of the pieces, to make fundamental improvements our customers' work flows.”
As examples, the EEsof management team described to the writer their work with the leading RF/MW foundries to provide complete Process Design Kits, as well as the addition of embedded tools like the Desktop Design Rule Checking and Desktop Layout vs. Schematic that now put these important design steps at the RF/MW designer's finger tips.
The EEsof technical breakthroughs with X-parameters, and the investments made to truly integrate 3D EM simulation in the flow are other examples.
D. Digital and RF
In the past decade, there has been an explosion of new wireless standards and new formats. The complexity of today's and tomorrow's emerging wireless communications standards is forcing traditional analog/RF designers to face a new reality; namely, that baseband DSP (digital signal processing) and RF must live side by side. The increasing horsepower and decreasing size/cost/power envelope of baseband DSP hardware (both in embedded DSP and FPGA architectures) allows analog and RF design to stretch the boundaries of technology. (FPGA = Field Programmable Gate Array) The necessity of “co-design” whereby both DSP and analog/RF parameters are analyzed and optimized simultaneously
is being accepted widely, both in commercial wireless design as well as in defense applications like software-defined radio and advanced RADAR design.
“Several years ago we started development on a new Electronic System Level (ESL) software platform (SystemVue) that helps our customers design and prototype complex communication systems, by combining advanced DSP capability with behavioral RF,” said Larry Lerner. “In the case of commercial wireless design, where complex 3.9G/4G standards are becoming more mature, like LTE (Long Term Evolution) or WiMax, we not only allow complex co-design of DSP with behavioral RF, but also we provide pre-built DSP libraries of PHY (Physical Layer) layer1 building blocks for our customers to verify that their designs really work under 'drive-test' conditions.”
VI. One Last Comment:
Sharp-eyed readers of the EDA Weekly on
Agilent EEsof EDA - Part I, first posted on February 01, 2010, surely initially noticed the entry deep in the text,
“Watch this space for possible Breaking News”. This entry was placed there by the writer, who had been informed before February 01, 2010 that a change in Agilent EEsof EDA leadership was occurring, but that the news was enjoined until after the EDA Weekly press time on February 01.
So subsequent to the February 01 posting of Part I of Agilent EEsof EDA, but still during the 2-week period when the article was actively featured on the EDAcafe.com web site (on February 11, 2010 to be precise), we inserted the following announcement into the Part I article (the photo is new):
University with a PhD in Microwave Engineering, Mark joined HP/Agilent in 1987.
After 10 years of successfully leading Agilent EEsof EDA, Jim McGillivary will be working closely with Mark until the end of April 2010 before leaving Agilent to pursue other opportunities.
 Larry Lerner's BIO
Current Position: Senior R&D Manager
Larry Lerner was born in 1957 and reared in Los Angeles.
In 1975 he entered Harvey Mudd College in Claremont, CA, graduating in 1979. He went on to Stanford were he received an MSEE in 1980.
Larry's first job was as a system design engineer working on multi-channel EW receivers for Bunker Ramo located in Westlake Village, CA.
In 1982 he moved over to Amplica, where he was responsible for designing microwave hybrid amplifiers and automated device characterization.
In 1984, after 2 years at Amplica, Larry was hired into a new software company, EEsof, as one of its first R&D employees.
Since that time Larry has held several jobs at EEsof, including R&D section manager, product planning manager, and (since 2000) Senior R&D Manager responsible for worldwide product development and order fulfillment.
Larry is married with 2 children and lives in Camarillo, CA.
 Charles Plott BIO:
Current Position: Product Marketing & Planning Manager
Charles Plott was born in 1965 and spent most of his early life in Southern California.
In 1984 he entered the University of California at Santa Barbara and graduated in 1989 with high honors in Electrical and Computer Engineering with a focus on Microwave Engineering. Charles also holds a BA degree in Economics/Mathematics from UCSB and was the University's sole recipient of the “Outstanding Achievements in Economics/Mathematics” award in his 1989 graduating class.
Charles joined HP in 1989 and started working in the marketing department of the CAE operation. Since then, Charles has held a wide variety of management positions within the HP/Agilent EEsof business. His current organization inside Agilent EEsof EDA is responsible for both inbound and outbound marketing for the Company. In addition to this, he also leads strategic planning for the Agilent EEsof EDA organization.
Before being promoted to the Agilent EEsof EDA leadership team in 2005, Charles held several other management positions within Agilent Technologies, including section manager for Agilent EEsof's Product Marketing organization, building and managing Agilent EEsof's Technical Application Development Organization, and holding several management roles related to Agilent EEsof's recent acquisitions. In 2006, he started a Business Initiative focused on accelerating Agilent's Electromagnetic Simulation portfolio and he continues to lead that cross-functional team today.
Charles now resides with his family in Santa Rosa, California with his wife and two boys.
 Jim McGillivary BIO
Position: March 200 - April 2010 VP & General Manager, now emeritus
Jim McGillivary was born in 1961 and reared in Detroit, Michigan.
In 1979 he entered the University of Michigan, where he earned a BSEE in Electrical Engineering in 1983. He paid for his college education by working as a bicycle and high-end audio repair person.
His first job out of college was with Harris in Florida. Six months later he followed his fiancée out to Cupertino, CA and worked for Lockheed in Sunnyvale for 2 years. In 1996 he hired into HP as an EMI/RFI design engineer at the HP Integrated Systems Division (ISD) in Sunnyvale, CA.
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-- Russ Henke, EDACafe.com Contributing Editor.