March 23, 2009
The Aart of Analogy Revisited
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Despite turmoil and tempest, technical conferences continue unabated in Silicon Valley. In the last 4 weeks alone,
Multicore-Expo have played themselves out in San Jose and Santa Clara. Over the next several weeks,
ESC and Magma’s
MUSIC will be here, as well. It's true, attendance is somewhat down due to travel budget restrictions, but the presentations, keynotes and panels continue nonetheless, as do the proceedings, conference bags, food and beverages.
No need to worry that these events are happening in a vacuum, however. Every speaker I’ve heard at every conference over the last 4 weeks has felt obliged to mention, no matter the nature of the talk, that the topic at hand is being affected by the global downturn. These tumultuous economic times are thoroughly woven into the content.
And while the ubiquitous empty office space all over Silicon Valley continues to attest to the lingering affects of the last downturn, circa 2001,
National Semiconductor’s recent announcement that 26 percent of its workforce is being laid off summarizes the current downturn, circa 2009. Unemployment in Silicon Valley has now hit 10 percent, proving the current downturn is worse than the last.
But don’t let the news overwhelm. By all reports at all conferences of late, progress continues with people determined to stay focused on the future. At the
EDA: Dead or Alive? panel at DVCon, the seven panelists were unequivocal: EDA is more than alive. It’s the single most important pre-requisite for progress in electronics. Unless the electronics industry itself dies, which it will not, EDA will never be dead.
In the weeks after the DVCon panel on February 25th, I spoke individually at length with all seven participants, following up on various topics discussed during the panel and available here on
* Javelin Design’s
Diana Feng Raggett:
* EVE’s Lauro Rizzatti:
* Berkeley Design Automation’s
Beyond these conversations, there have been a host of other topics tackled at the various conference venues in the last 4 weeks.
ISQED on March 17th, Conference Chair and Synopsys President
Chi-Foon Chan gave a keynote outlining the benefits and challenges inherent to EDA, with emphasis on digital design, packaging, and the massive ROI available to those who participate. Magma CEO
Rajeev Madhavan followed with a keynote outlining the benefits and challenges inherent in analog and mixed-signal design, and the need to further enable process migration in analog. The final keynote came from Mentor Graphic’s VP and GM
Simon Bloch who gave a mini-tutorial on the definitions and importance of ESL, TLM, and moving to higher levels of abstraction. The three keynotes, taken together, were effective summary of the major initiatives underway at the biggest companies in EDA.
The evening of March 17th at ISQED, EDA Tech Forum’s
Paul Dempsey moderated a panel on another critical issue in EDA, design for manufacturing. Dempsey’s query,
DFM: Insurance Policy or Secret Weapon, led to a lengthy after-dinner give and take between the panelists: Chartered’s
Walter Ng, Global Foundries’
Luigi Capodieci, Virage Logic’s
Yervant Zorian, Atmel’s
Steve Schumann, and Mentor Graphic’s
Their conclusions were not surprising. DFM is important, the ROI can be quantized for the skeptics among you, and there are tools in place today that: a) engineers embrace, b) foundries endorse, and c) management accepts. The fact that people in the audience seemed a bit less than sold on the whole idea was due, per the panel, to a lack of education and exposure on the part of the audience. The panelists argued DFM is definitely here and, more importantly, is transparent to the engineer. Use it or suffer the consequences. Walter Ng emphasized, however, that DFM is still sorely lacking standards.
While ISQED was playing itself out at the DoubleTree in San Jose, the
Multicore-Expo was underway up the road at the Santa Clara Convention Center. Conference Chair
Markus Levy said upwards of 700 people were registered. Conference content was complex, which was not surprising given the fluid and ubiquitous nature of the evolution of multicore devices today. Even the definitions are still up for grabs, so get a pencil and create a graph with 2 columns and 15 rows. Label the two columns Hardware and Software. Label the 15 rows: Core, Pipe, Multicore, Multipipe, Multiprocessor, AMP, SMP, Multitask, Multithread, Load balancing, Granular parallel, Course parallel, Homogeneous, Heterogeneous, and Parallel code.
Dave Stewart, CEO of
Critical Blue, and
Tony King-Smith, VP of Marketing atImagination Technologies. Engage them in conversation – Stewart about software, and King-Smith about hardware. Jot down what they have to say in the appropriate cells of your graph. Then, accept that the jury is still completely out with respect to the definitions, who the major players are in multicore, and whether today’s multicore hardware is being fully utilized, let alone tomorrow’s hardware, and whether or not today’s legacy code can be parallelized, let alone tomorrow’s new code. Now you’re ready to attend Multicore-Expo 2010 – that is, if you sweep the columns and rows into a third dimension that reflects a host of different
application spaces. Multicore and everything that it involves/implies is the single most daunting paradigm facing the industry today – no matter how you define the industry.
Meanwhile, in case you weren’t feeling manic enough March 16th to19th trying to be in two places at once – ISQED and Multicore-Expo – there was more. Silicon Valley SNUG 2009, the Synopsys Users Group, was also scheduled into the March 16th-to-19th timeslot. Don’t these conference organizers talk? Aren’t they sufficiently worried about attendance at the various conferences to not double or triple book? Who knows? These things are often a mystery to me.
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-- Peggy Aycinena, EDACafe.com Contributing Editor.
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