March 02, 2009
The Future of EDA and the Semiconductor Industry, One Man’s View
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Jack Horgan - Contributing Editor


by Jack Horgan - Contributing Editor
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The key message is “Do it your self is dead”. You would not go to your board and say “Great news. We are going to write a new Place and Route tool”. The same thing will happen in the next few years, particularly with this recession. Your average CEO will not walk in and say “Let me tell you how I am going to buy a bunch of EDA tools, have 10 physical designers, and hire my own opps team in order to do that chip every 18 months.” It will not happen. We are getting calls on a weekly basis from companies that are recognizing this and are looking to shut down their so-called backend function and outsource it to companies like
ours. Not just us but companies like us. It is a very exciting time for this business model.


The trend is a change in the compound growth rate of the semiconductor industry. Over the last 35 years. What you can see is that every time there has been a drop or a recession in the semiconductor industry, some major chunk of that infrastructure has been jettisoned and formed into a new subindustry.


It started with assembly, all the way through what we call “Value Chain Producer”. TSMC calls us a “value chain aggregator”. But the point is that this is a new industry in the early stages. I saw it personally in ’83 and ’84 with EDA and I saw it personally with design and IP in the early to mid nineties. I am watching it now. From our perspective, notwithstanding the fact that everyone would rather we had a healthy overall economy, this is a perfect storm for the birth of the value chain aggregator: massive recession, the need to jettison fixed cost, increasing complexity and reduction of specific workload by group. That’s why I
can say with confidence that this will be a multi-billion dollar segment within 3 to 5 years. It could be $10 billion in 5 years. That’s my personal forecast.


We launched what a lot of people thought was a crazy model 10 years ago. In many respects it was an extension of a vision I had at Cadence that was unfulfilled. Today it is a $1 billion market segment that is growing 3 times faster than the semiconductor industry during good times. It is understood to be the model of choice for not only small businesses like ours but all the large companies have morphed into the fabless ASIC model underscoring its value and importance. Specifically, our company is enjoying profitable growth and we are expecting a very bright future and absent a global recession I think we would be talking about very bold growth in the immediate year. Our expectation for
the year 2009 is to be flat over last year which was profitable and outstanding. We are delighted with that candidly. If we can maintain flat growth year-over-year, we feel we have done our job.


What was your revenue last year?

Just about $70 million and we were profitable.


We surveyed customers that elected not to do it themselves and asked “Why did you make this decision?” The chart below is an average or a proxy for their analysis. If you notice, it says that eSilicon has 10% higher COGS. They all presumed that we would cost more even though we don’t. But even when they said “We guessed that you might be more money, but the savings were so compelling that we decided we don’t want to do this anymore.”


I will tell you candidly that in the cases where small businesses (I mean under $200 million/year) continue to do their own operations, it is only due to the political survival of those jobs by the people doing them. There is no financial case I have ever seen by anyone who is honest about what their real costs are to make a chip – not moving some to Marketing or R&D and all over the place. If they sit down and say what the cost is to make that chip, virtually no one can beat us with this model. As a variable cost, it is an absolute no-brainer. The rate at which CEOs and Boards are recognizing this phenomenon tells me that the operations jobs will exist only in aggregators going
forward with the exception of the top 20 to 30 large businesses who can justify their own eSilicon inside them.


When someone outsource whether an individual going to a doctor, a lawyer or tax advisor or where a company goes outside, sometimes it is because they flat out lack the expertise, sometimes they have the expertise but not in sufficient quantity to do everything they need or want to do at a point in time, sometimes they do it for cost savings and sometimes they think that someone else can do a better job. It sounds to me that your pitch is a combination of the last two that is that you can do a better job for less money.


Yeah, but you know what I will tell you is that in the last 30 days two of the top 10 largest semiconductor companies in the world signed contracts with us to make chips for them. For the first one, the case was one of peak load. They needed more chip capability and did not want to hire with fixed costs at this time. So honestly five years ago I would not have predicted that outcome but we are seeing it more and more. The big guys are saying “No more fixed costs. If we need the chip at the margin, if they can make 10 chips but need 11 chips, we will outsource the 11th.” It is that category as well. That is what is driving the top brands, the top 10 guys, to work
with our model.


Other than large companies that have their own internal operations, are there any firms like eSilicon out there?

Yes, there are a few. There are two companies that are closely held by the two large fabs. TSMC owns 50% of a company called Global Unichip, which has a version of our business. What is different about them is that they do lots of pass through distribution sales. In other words, they might work in remote territories and just service the account by selling them wafers with a small markup. But they also do some of what we do. That’s one version. Then USMC has a company called Faraday which has a similar model to GUC. It has large ownership by USMC and they are tightly coupled at the hip. There is a third company that looks like us and is independent call Open-Silicon. But I think that they have a large percentage of their employees in India. Basically they are chasing the low cost model as opposed to the complexity model. Our customers want to make complex chips that have to last for 5 to 10 years in systems reliably with very high standards. We have fewer customers that put chips into toys that are disposable. Between the four companies there is something lie a half-billion in revenue. The there are dogs and cats all over the place that used to be design companies that now “tape out” They are still design centric. Ninety percent of their revenue is design. The vast majority of our revenue is from production. We are a semiconductor company that happens
to design as necessary, when our customers need us to do physical design and layout. But we make money shipping silicon.


You website describes engagement solutions which differ by where in the design flow eSilicon takes over; netlist, GDS II, custom, .. Would you expand on that and give us some idea of the percentage of the business that comes from each?

There are really three broad places with some subcategories. The most common is the netlist handoff. That is where the customer says “I’ve finished the RTL, I may or may not have done synthesis yet but I am right about the time that the netlist is done.” About 60% of the time we get a netlist and we do the physical design, we do the layout. Then you move back to the front of the design process, where there is a specification handoff. This occurs about 5% of the time. This is based upon our own limiting factors. We don’t like this as much but every now and then we will do a spec handoff. We will write the RTL. It has to do with the application or the customer. If it is an existing customer, who wants us to help them out, we will do it. That’s about 5% of the time. Then about 35% of the time, there is the so-called GDSII handoff. That’s where the physical design is done, the tapeout is now ready to be prepared and launched to TSMC and we take over the flow right then and there. What they all have in common is that we always make the silicon, even though it has the customer’s name and logo on it. We always make the chip. We earn money by shipping chips to them. The reason we can do that is that we believe we can manage the yield even, if we did not do the layout. We can manage the yield with our team of experts, who are here full time, doing it every day. We are better than our average customer and we run those chips until the end of life. In some cases it is 3 years and in some cases it is 10 years. As a nine year old company, we have customers now who have been shipping silicon for 6 to 7 years with no end in sight. It could be industrial chips, networking parts. Things like that. These are the three basic models.
That is pretty much true with all our competitors.




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-- Jack Horgan, EDACafe.com Contributing Editor.


Reviews:
Review Article
  • Great interview. Very insightful.... March 05, 2009
    Reviewed by 'EDA Observer'
    Thank you Mr Horgan for this insightful interview. I remember when Cadence acquired CCT.
    Paying $1 billion for a comapany with just $15 million in revenues shows how Cadence-Synopsys rivalry and their legal battles in the context of an "irrationally exuberant" stock (and M&A) market fueled decisions by Cadence exectives that explain partially why Cadence is where it is today.


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  • Full circle or Half circle?? March 04, 2009
    Reviewed by 'Anil Nadig'
    We started the semiconductor industry with one company coming up with the architecture, write the RTL, do the layout with thier in-house tools and fabricate in their own fab (AKA IDMs). Then we shed the fabrication saying its too costly to maintain and invest in RnD (The Foundary company?), and then the in-house tools sayings its cumbersome to develop (EDA vendors?) and spawned off the layout-ing to a third party saying too much overhead because of fixed costs (Esilicon?). But the future seems to be "specalized" "Value chain producers" with access to foundry to be able to have insight into nanometer issues (DFM?) and in-house developed tools with the knowledge gained from foundry to have edge over competitors. Which means the future seems to be putting back atleast half (in-house foundry and in-house tools) of the things, that we shed for various reasons into, one company. Half circle?? May be a day will come when you may want to integrate these "specialized" "value chain producers" back to the architucture and RTL team for some reason thats not yet foreseen. That would be the full circle!!!. At least the near to middle term seems to be the half circle for sure.

      One person of 2 found this review helpful.

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  • The Future of EDA March 03, 2009
    Reviewed by 'Jeff Liu'
    The Future of EDA and the Semiconductor Industry, One Man’s View


      One person of 3 found this review helpful.

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