November 17, 2008
The Best of Times, The Worst of Time: Part 2
Please note that contributed articles, blog entries, and comments posted on EDACafe.com are the views and opinion of the author and do not necessarily represent the views and opinions of the management and staff of Internet Business Systems and its subsidiary web-sites.
Peggy Aycinena - Contributing Editor


by Peggy Aycinena - Contributing Editor
Posted anew every four weeks or so, the EDA WEEKLY delivers to its readers information concerning the latest happenings in the EDA industry, covering vendors, products, finances and new developments. Frequently, feature articles on selected public or private EDA companies are presented. Brought to you by EDACafe.com. If we miss a story or subject that you feel deserves to be included, or you just want to suggest a future topic, please contact us! Questions? Feedback? Click here. Thank you!

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JEDA Technologies announced the premier release of the JEDA Validation Tools Suite, “an integrated ESL model validation solution that establishes a predictable and efficient validation flow for high level models. The Suite consists of advanced code coverage for SystemC models, functional data coverage, temporal rule checks native in SystemC, intelligent traffic generators, and a test ranking system that prioritizes regression tests based on various user decision criteria.”

JEDA CEO

Eugene Zhang and I spoke recently about this new release, and the need for the industry to fully embrace TLM 2.0. In particular, Zhang spoke about the idea that ESL 2.0 = EDA 4.0, as suggested in my October 2006 EDA Weekly article.

Per Zhang: “I think today we are still in ESL1.0, still in the process of turning a few characteristics laid out in your article into a reality. This will take some time, because ESL has lost some momentum and only had limited success so far.

“Speaking from personal experience, from 2005 to 2008, while JEDA was working in the field of ESL, I observed numerous false starts and backfires experience by early adopters of ESL – particularly among the leading semiconductor companies in Japan. There were multiple reasons, but one of the key reasons was a failure on the part of the technology to meet expectations. Bad quality in ESL products caused tremendous pain for the customers, things like problems between the IP models and the virtual platforms coming from different sources were nightmares for the customers. The reaction from users has been to politely

keep ESL usage inside the CAD groups in Japan, restricted to in-house solutions in Europe, or an ongoing wait-and-see attitude in the U.S.

“Now with the release of TLM2.0, however, we see there is a second chance for ESL, but it absolutely must start with a bang. It simply can’t stop with flashy demos, and then fall apart as the customers start to us it. It must be delivered able to meet real production requirements.

“What I was at Juniper, the first question asked of us was always – ‘How did you verify your Verilog IP model?’ – whenever an IP provider knocked on the door. If that question was not adequately addressed, the rest of the conversation was moot. Similarly for ESL, if IP providers are not ready to answer the verification question, or even if the ESL end-users don’t ask the question, if means the whole transition is not a serious one, and ESL will continue to go nowhere.

“ A successful ESL solution provider absolutely must have multiple-domain expertise, which is actually quite difficult to assemble – which is yet another reason for the slow adoption of ESL. Worse yet, if self-awareness of ESL issues is not there among the players, the move will not happen. We need dynamic leadership to make ESL happen sooner rather than later, but it will eventually happen.”

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Magma announced that the company’s Titan Analog Migration will be incorporated into
TSMC’s analog design environment. Per the Press Release: “TSMC uses Titan AM to port its analog IP building blocks to new process nodes so its customers and partners can quickly implement their designs in TSMC's advanced technologies.”

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The MathWorks announced the Simscape language, described as a “new capability that enables textual authoring of physical modeling components, domains, and libraries in the Simulink environment. The new language is included in Simscape, which extends Simulink for modeling and simulating mechatronic and other multidomain physical systems using a physical network, or acausal modeling, approach. [It] enables engineers to develop reusable models of components and systems for rapidly advancing technologies, such as fuel cells, wind power systems, and hybrid electric
vehicles.”

By the way, the folks at The MathWorks assure me that you needn’t despair because you’ve got yet another language to learn to do your job. They say this new language is fully adapted to the widely understood MATLAB. Therefore, worry not.

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Mentor Graphics announced the
Mentor Graphics PCB Design Laboratory at the Lake Washington Technical College in Kirkland, Washington. The company says, “The primary purpose of the lab will be to teach PCB design methodologies based on the Mentor Expedition tool flow. Under the auspices of Mentor’s Higher Education Program, Mentor has donated more than $8M worth of EDA software and support to enable students of LWTC to graduate with in-depth knowledge of the latest PCB design methodologies. In addition, Mentor has donated computing hardware with which to conduct the classes.” Nice!

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MIPS Technologies announced the MIPS Navigator ICS, which the company says will allow embedded de3velopers to code, debug, and analyze Linux systems on MIPS-based SoCs and embedded systems. Per the Press Release: “Navigator ICS brings together the industry's leading tools and technologies for MIPS development in a cohesive, off-the-shelf product, with new and innovative components for Linux development.”

Allen Watson, MIPS product marketing manager, told me on a recent phone call: “We’ve got extra modules in this suite to help debug Linux systems, and generalize them to make them better for the 60-to-70 percent of our customers who use Linux.”

I asked Watson to describe those customers: “MIPS licenses cores to semiconductor vendors, either large companies like Broadcom or smaller fabless companies. Broadcom, for instance, may come out with a chip and need some tools to get it running, Then they sell that chip to tens of other small or large companies, so now we have two sets of customers – our customers, and our customers’ customers. Sometimes the needs of the two groups are slightly different, so we need to understand both of them and which tools are suitable for use in each setting.”

Watson explained why it‘s easier for MIPS to provide these tools, rather than have the customers develop them in-house. “We are integrating a lot of things together with Navigator ICS. It’s really offers better time-to-market, plus a reduced risk and cost to our customers, as well. If the customers try to do this on their own, they have to spend the time and bear the risk. At some point our customers reach a point where they realize the advantages of having us do this integration for them.”

Why don’t EDA vendors provide these tools? Per Watson: “There are many tools available for our third-party ecosystem partners, but we’ve done some things with our tools which reach deep in to our cores – things that a third-party vendors would not find it worthwhile to do.”

Jack Browne, MIPS VP of Marketing, was also on the call. Browne said, “At the end of the day, it’s about helping customers get to production, to enable them with as much performance as possible. By letting our customers tune the Linux kernel on their hardware, by enhancing their capability in using open source, we’re helping them exceed expectations with their customers. They already know that MIPS-based systems are really good out in the marketplace. Now with this suite, we’re providing additional design debug capabilities that
allows customers to produce more efficient hardware and software.”

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Sigrity announced SpeedXP 8.1 beta, as well as enhancements to the company’s SPEED2000, PowerSI, PowerDC, Broadband SPICE, XtractIM, OptimizePI and UPD products. Folks are definitely working hard at Sigrity. Downturn? What downturn?

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Synopsys announced a “complete, single vendor SuperSpeed USB IP solution consisting of the DesignWare device controller, PHY and verification IP … includes a SuperSpeed USB virtual platform and drivers to aid software development. Utilizing elements from a single vendor enables designers to quickly create SuperSpeed USB-based designs from concept through implementation and software development.”



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-- Peggy Aycinena, EDACafe.com Contributing Editor.


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