August 04, 2008
Tensilica and Customizable Processors
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Jack Horgan - Contributing Editor

by Jack Horgan - Contributing Editor
Posted anew every four weeks or so, the EDA WEEKLY delivers to its readers information concerning the latest happenings in the EDA industry, covering vendors, products, finances and new developments. Frequently, feature articles on selected public or private EDA companies are presented. Brought to you by If we miss a story or subject that you feel deserves to be included, or you just want to suggest a future topic, please contact us! Questions? Feedback? Click here. Thank you!

Cadence Reports Q2 Revenue of $329 Million Cadence Design Systems, Inc. reported second quarter 2008 revenue of $329 million, compared to revenue of $391 million reported for the same period in 2007. On a GAAP basis, Cadence recognized net income of $5 million, or $0.02 per share on a diluted basis, in the second quarter of 2008, compared to net income of $60 million, or $0.20 per share on a diluted basis, in the same period in 2007.

Although we achieved our Q2 numbers, it was more difficult than we planned. Customers are demanding still more flexibility in when, what and how they purchase software and hardware," said Mike Fister, chief executive officer. "As a result we've made the decision to lower our outlook and transition to an approximately ninety-percent ratable license mix.

Synopsys Announces Availability of New Fully Synthesizable PowerPC Cores Synopsys, Inc. announced the availability of fully synthesizable implementations of the IBM PowerPC 460 and cache configurable PowerPC 405 embedded microprocessor cores as components of the DesignWare Star IP program. Developed through a close collaboration between IBM and the Synopsys Professional Services and DesignWare IP teams, the foundry-independent processor cores are supported by a broad range of design tools in the Synopsys Galaxy Design and Discovery Verification platforms. The PowerPC 460S and 405S
processors are distributed as simulation and timing models and synthesizable (RTL cores. Synthesizable IBM CoreConnect peripherals are also available to licensees of the PowerPC cores.

Synopsys is Selected by National Semiconductor as Their Key EDA Partner Synopsys announced that National Semiconductor Corp has selected Synopsys as their key EDA partner for use in product development. The expanded relationship provides National access to Synopsys' Analog/Mixed-Signal and custom IC design tools and the opportunity to collaborate in next generation solutions. As part of the agreement, National has chosen products across Synopsys' product portfolio

LogicVision Reports Second Quarter Financial Results LogicVision, Inc. announced its financial results for the second quarter of 2008, ended June 30, 2008. Revenues in the second quarter of 2008 were $3.0 million, compared with $3.0 million in the first quarter of 2008. Net loss in the second quarter of 2008 was $1.0 million, or $0.10 per share, compared with a net loss of $1.3 million, or $0.13 per share, reported in the first quarter of 2008.

Other EDA News

  • Other IP & SoC News

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    -- Jack Horgan, Contributing Editor.


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