October 22, 2007
Can a Firm Prosper or Even Survive, If It Gives Away Its Product?
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Reading between the lines it sounds like the process data instead of being embedded is left external to the PyCell. So if you want to port
I think that is a major issue for folks. If you want to take a SERDES design which tends to be done at the transistor level and port that from 65 nm to 45 nm, you need to have PCells for both those processes. Using PyCells you don’t need two you can use the same PyCell. You use a different technology file which is standard kind of data that people have lying around. It just works. You still have to change the layout of where the transistors are and so forth. Typically the layout is going to be done over again but modifying the transistors is much easier.
Cadence and EEsof do not appear to be members of IPI.
Not at this time but we are hoping. I think there is a compelling reason why lots of people should get involved namely the ability of the industry to do more powerful kinds of things with PyCells. That’s going to enable new kinds of design tools, applications and automation in this corner of the world and that will be an opportunity for everybody, all EDA companies and all semiconductor companies. I hope that Cadence and EEsof will get involved.
What is the relationship between you offerings and OpenAccess?
We use OpenAccess (OA) as our core database. Cadence is moving their infrastructure in the custom area to OpenAccess. I think Open Access is a great thing for the industry. Kudos to Cadence. Their vision of building an open architecture would help everybody. It can grow the market for everybody. That’s the right vision. Kudos for them for doing it. OA is going to be a benefit for everybody.
Ciranova was founded in 2002. How big a company is it today?
We have less than 20 people.
If my research is correct, Ciranova has raised about $15 million in venture funding.
That’s correct. We changed business models about two years ago with the Series C funding. At the same time there was a change in direction and strategy. It was at Series C that we went to OpenAccess and open PyCells. That’s our core business right now. That’s the first phase of our core business. It’s about 2 to 3 years old.
One of the things of interest is that PyCell Studio is a free product. What does one get for free?
PyCell Studio is basically a development system for PyCells. It includes utilities, graphics interface, editors and a bunch of things to make it a lot easier to develop them and it includes our API as well which is the core of PyCells.
If I get PyCell Studio for free, are there other not-for-free modules required to effectively use PyCells. Or is there some size or performance limitation with the free version?
No. If you get PyCell Studio you’ve got what you need. Our plan in the future is to offer upgrade get a lot of support for free. If you want a higher level of support then we will do a contract with you. That is a business for us. Most of our focus is on what you are able to do with PyCells. We would like to see lots of use PyCells.
According to Ciranova’s website support for a developer starts at $15k and support for an end user of the developed PyCells at $5K. The price drops with increasing number of users.
How do you know how many developers and end users a given customer has?
We ask. So far that model has worked very well.
Ciranova plans to have follow-on products in the future but do you have any products available for sale today?
We have not announced any major follow-on products. Our interest lies in the area of automating custom design which is largely manual today. One of the characteristics of the people who design PLLs, Phys, Serdes, DDRs and so forth is that these things have a heavy analog component which is done largely by hand. One of the things analog designers do is that they tend to do a lot of sophisticated manipulations of the transistors themselves not just where they go on the chip or how they are hooked up together but what the transistor actually looks like. So we believe it is important to automate both of those things at once. That’s the kind of area we are doing development in for
future products. One of the good things about PyCells is that they lend themselves well to working with systems at higher levels. We think that is important to the industry.
Is the target market analog, mixed signal, ? Any possible application for digital?
Yeah. The technology we developed with PyCells and that we are working on extending is clearly applicable to analog and mixed signal kinds of things. It is also applicable to other transistor level design applications like memory design for example and for a lot of very high performance digital circuits so microprocessors, customs data paths. Those trend to be done at the transistor level as well. What we have got is applicable as well. That being said, there are a bunch of people in our company who know a lot about analog. It is a natural inclination for us to look at that function.
There are some successful business models based on giving something away and then following up with products and/or services. An example would be Gillette who gave away the razor and made money selling blades.
Red Hat is a good example of that too. Linux is an open operating system, open source and so forth. Yet Red Hat is a sizeable company providing support and capability. In the razor and blade strategy, the razor wasn’t much good without the blade. In the case of PyCell they are perfectly good without the anything else. We are not in a position to come back and say we are going to stealthily charge you for PyCells. That is not the case here. It is more the Red Hat model. A better analogy.
The analog market is relatively small compared to the digital market.
Yes it is. It is kind of interesting. If you look at the semiconductor markets the analog and RFIC markets are about one-half the size of the logic market not including memory. The analog EDA market is much smaller than one-half the size of the SoC, synthesis, place and route i.e. the core digital market. We think that it is an indication that the analog market ought to be a lot bigger. If you look at how things work in digital, at somebody who does system on chip layout, the style that Cadence, Magma, Synopsys and so forth do; if you look at the engineering those companies spend a lot more money on software. Each engineer has hundreds and hundreds of thousands of dollars in tools that they are using. The software is a lot more expensive than the engineer. If you go look in the analog space, they don’t spend nearly that much money on software. The engineer is a lot more expensive than the software they use. We believe the reason for that is that there is just not that much automation. So you have people doing it by hand in analog. The custom and analog space never went through the same transition that digital did where it all got automated. You have people doing the same sort of work over and over again. There is a certain amount of creative work and a lot of repetitive work porting the same voltage regulator from this process variation to that process variation.
We believe that the whole infrastructure is ripe for change. With the application of the right kind of automation technology the market for analog and mixed signal can be much bigger. When you ask why I left my job at Cadence, the world’s largest EDA company, to come here and do this, I see an opportunity to help make that happen and that is very exciting.
If the value statement is that you can make analog designers who make say $150K a year more productive, how much would someone pay for that?
Don’t you have to translate that into a superior end result by some objective criterion say performance or into a faster time to market?
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-- Jack Horgan, EDACafe.com Contributing Editor.
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